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Searched refs:BLKADDR_RVUM (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/crypto/marvell/octeontx2/
A Dotx2_cptpf_main.c26 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_enable_vfpf_mbox_intr()
28 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_enable_vfpf_mbox_intr()
33 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_enable_vfpf_mbox_intr()
40 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_enable_vfpf_mbox_intr()
52 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_disable_vfpf_mbox_intr()
54 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_disable_vfpf_mbox_intr()
57 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_disable_vfpf_mbox_intr()
79 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_enable_vf_flr_me_intrs()
85 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_enable_vf_flr_me_intrs()
168 otx2_cpt_write64(pf->reg_base, BLKADDR_RVUM, 0, in cptpf_flr_wq_handler()
[all …]
A Dotx2_cptvf_main.c16 otx2_cpt_write64(cptvf->reg_base, BLKADDR_RVUM, 0, OTX2_RVU_VF_INT, in cptvf_enable_pfvf_mbox_intrs()
20 otx2_cpt_write64(cptvf->reg_base, BLKADDR_RVUM, 0, in cptvf_enable_pfvf_mbox_intrs()
27 otx2_cpt_write64(cptvf->reg_base, BLKADDR_RVUM, 0, in cptvf_disable_pfvf_mbox_intrs()
31 otx2_cpt_write64(cptvf->reg_base, BLKADDR_RVUM, 0, OTX2_RVU_VF_INT, in cptvf_disable_pfvf_mbox_intrs()
A Dotx2_cptvf_mbox.c56 intr = otx2_cpt_read64(cptvf->reg_base, BLKADDR_RVUM, 0, in otx2_cptvf_pfvf_mbox_intr()
63 otx2_cpt_write64(cptvf->reg_base, BLKADDR_RVUM, 0, in otx2_cptvf_pfvf_mbox_intr()
A Dotx2_cptpf_mbox.c358 intr = otx2_cpt_read64(cptpf->reg_base, BLKADDR_RVUM, 0, in otx2_cptpf_vfpf_mbox_intr()
367 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, in otx2_cptpf_vfpf_mbox_intr()
431 intr = otx2_cpt_read64(cptpf->reg_base, BLKADDR_RVUM, 0, RVU_PF_INT); in otx2_cptpf_afpf_mbox_intr()
448 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, RVU_PF_INT, in otx2_cptpf_afpf_mbox_intr()
/linux/drivers/net/ethernet/marvell/octeontx2/af/
A Drvu.c494 rvu_write64(rvu, BLKADDR_RVUM, in rvu_setup_rvum_blk_revid()
501 rvu_write64(rvu, BLKADDR_RVUM, in rvu_clear_rvum_blk_revid()
653 rvu_write64(rvu, BLKADDR_RVUM, in rvu_setup_msix_resources()
660 cfg = rvu_read64(rvu, BLKADDR_RVUM, in rvu_setup_msix_resources()
680 cfg = rvu_read64(rvu, BLKADDR_RVUM, in rvu_setup_msix_resources()
685 rvu_write64(rvu, BLKADDR_RVUM, in rvu_setup_msix_resources()
2005 cfg = rvu_read64(rvu, BLKADDR_RVUM, in rvu_mbox_handler_vf_flr()
2654 rvu_write64(rvu, BLKADDR_RVUM, in rvu_enable_mbox_intr()
3002 rvu_write64(rvu, BLKADDR_RVUM, in rvu_register_interrupts()
3022 rvu_write64(rvu, BLKADDR_RVUM, in rvu_register_interrupts()
[all …]
A Drvu_cn10k.c71 rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_SMMU_ADDR_REQ, iova); in rvu_get_lmtaddr()
75 rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_SMMU_TXN_REQ, val); in rvu_get_lmtaddr()
77 err = rvu_poll_reg(rvu, BLKADDR_RVUM, RVU_AF_SMMU_ADDR_RSP_STS, BIT_ULL(0), false); in rvu_get_lmtaddr()
82 val = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_SMMU_ADDR_RSP_STS); in rvu_get_lmtaddr()
91 pa = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_SMMU_TLN_FLIT0) >> 18; in rvu_get_lmtaddr()
A Drvu_struct.h18 BLKADDR_RVUM = 0x0ULL, enumerator
A Drvu_debugfs.c3105 cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf)); in rvu_dbg_npc_mcam_info_display()
A Drvu_nix.c3531 cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf)); in nix_setup_mce_tables()
/linux/drivers/net/ethernet/marvell/octeontx2/nic/
A Dotx2_common.h629 blkaddr = BLKADDR_RVUM; in otx2_get_regaddr()
A Dotx2_pf.c2804 rev = otx2_read64(nic, RVU_PF_BLOCK_ADDRX_DISC(BLKADDR_RVUM)); in otx2_check_pf_usable()

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