Searched refs:C0_PWBASE (Results 1 – 3 of 3) sorted by relevance
| /linux/arch/mips/kvm/ |
| A D | entry.c | 251 UASM_i_MFC0(&p, GPR_K0, C0_PWBASE); in kvm_mips_build_enter_guest()
271 UASM_i_MTC0(&p, GPR_A0, C0_PWBASE); in kvm_mips_build_enter_guest()
652 UASM_i_MTC0(&p, GPR_A0, C0_PWBASE); in kvm_mips_build_exit()
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| /linux/arch/mips/mm/ |
| A D | tlbex.c | 793 UASM_i_MFC0(p, ptr, C0_PWBASE); in build_get_pmde64()
1572 UASM_i_MTC0(&p, a0, C0_PWBASE); in build_setup_pgd()
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| /linux/arch/mips/include/asm/ |
| A D | mipsregs.h | 86 #define C0_PWBASE 5, 5 macro
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