Searched refs:CLK_IFR_PWM_HCLK (Results 1 – 5 of 5) sorted by relevance
| /linux/include/dt-bindings/clock/ |
| A D | mt6765-clk.h | 171 #define CLK_IFR_PWM_HCLK 7 macro
|
| A D | mediatek,mt8365-clk.h | 160 #define CLK_IFR_PWM_HCLK 7 macro
|
| /linux/drivers/clk/mediatek/ |
| A D | clk-mt8365.c | 683 GATE_IFR2(CLK_IFR_PWM_HCLK, "ifr_pwm_hclk", "axi_sel", 15),
|
| A D | clk-mt6765.c | 569 GATE_IFR2(CLK_IFR_PWM_HCLK, "ifr_pwm_hclk", "axi_ck", 15),
|
| /linux/arch/arm64/boot/dts/mediatek/ |
| A D | mt8365.dtsi | 554 clocks = <&infracfg CLK_IFR_PWM_HCLK>,
|
Completed in 15 milliseconds