Searched refs:CLK_MM_DISP_POSTMASK0 (Results 1 – 9 of 9) sorted by relevance
| /linux/drivers/clk/mediatek/ |
| A D | clk-mt8186-mm.c | 46 GATE_MM0(CLK_MM_DISP_POSTMASK0, "mm_disp_postmask0", "top_disp", 14),
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| A D | clk-mt6779-mm.c | 83 GATE_MM1(CLK_MM_DISP_POSTMASK0, "mm_disp_pm0", "mm_sel", 14),
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| A D | clk-mt8192-mm.c | 56 GATE_MM0(CLK_MM_DISP_POSTMASK0, "mm_disp_postmask0", "disp_sel", 13),
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| /linux/Documentation/devicetree/bindings/display/mediatek/ |
| A D | mediatek,postmask.yaml | 80 clocks = <&mmsys CLK_MM_DISP_POSTMASK0>;
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| /linux/include/dt-bindings/clock/ |
| A D | mt6779-clk.h | 388 #define CLK_MM_DISP_POSTMASK0 48 macro
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| A D | mt8186-clk.h | 314 #define CLK_MM_DISP_POSTMASK0 13 macro
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| A D | mt8192-clk.h | 437 #define CLK_MM_DISP_POSTMASK0 13 macro
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| /linux/arch/arm64/boot/dts/mediatek/ |
| A D | mt8192.dtsi | 1582 clocks = <&mmsys CLK_MM_DISP_POSTMASK0>;
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| A D | mt8186.dtsi | 1903 clocks = <&mmsys CLK_MM_DISP_POSTMASK0>;
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