Searched refs:CLK_MM_DSI0 (Results 1 – 8 of 8) sorted by relevance
| /linux/drivers/clk/mediatek/ |
| A D | clk-mt6765-mm.c | 43 GATE_MM(CLK_MM_DSI0, "mm_dsi0", "mm_ck", 17),
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| A D | clk-mt8186-mm.c | 49 GATE_MM0(CLK_MM_DSI0, "mm_dsi0", "top_disp", 19),
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| A D | clk-mt8192-mm.c | 58 GATE_MM0(CLK_MM_DSI0, "mm_dsi0", "disp_sel", 15),
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| /linux/include/dt-bindings/clock/ |
| A D | mt6765-clk.h | 268 #define CLK_MM_DSI0 17 macro
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| A D | mt8186-clk.h | 317 #define CLK_MM_DSI0 16 macro
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| A D | mt8192-clk.h | 439 #define CLK_MM_DSI0 15 macro
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| /linux/arch/arm64/boot/dts/mediatek/ |
| A D | mt8192.dtsi | 1600 clocks = <&mmsys CLK_MM_DSI0>,
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| A D | mt8186.dtsi | 1921 clocks = <&mmsys CLK_MM_DSI0>,
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