Searched refs:CLK_MM_MM_SMI_COMM0 (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/clk/mediatek/
A D	clk-mt8365-mm.c	60 GATE_MM0(CLK_MM_MM_SMI_COMM0, "mm_smi_comm0", "mm_sel", 24),
/linux/include/dt-bindings/clock/
A D	mediatek,mt8365-clk.h	329 #define CLK_MM_MM_SMI_COMM0 24 macro
/linux/arch/arm64/boot/dts/mediatek/
A D	mt8365.dtsi	320 <&mmsys CLK_MM_MM_SMI_COMM0>, 741 <&mmsys CLK_MM_MM_SMI_COMM0>,

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