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Searched refs:CLK_TOP_ADSP (Results 1 – 11 of 11) sorted by relevance

/linux/sound/soc/sof/mediatek/mt8195/
A Dmt8195-clk.c17 [CLK_TOP_ADSP] = "adsp_sel",
58 ret = clk_prepare_enable(priv->clk[CLK_TOP_ADSP]); in adsp_enable_all_clock()
93 clk_disable_unprepare(priv->clk[CLK_TOP_ADSP]); in adsp_enable_all_clock()
107 clk_disable_unprepare(priv->clk[CLK_TOP_ADSP]); in adsp_disable_all_clock()
120 ret = clk_set_parent(priv->clk[CLK_TOP_ADSP], in adsp_default_clk_init()
A Dmt8195-clk.h16 CLK_TOP_ADSP, enumerator
/linux/Documentation/devicetree/bindings/dsp/
A Dmediatek,mt8195-dsp.yaml88 clocks = <&topckgen 10>, //CLK_TOP_ADSP
/linux/include/dt-bindings/clock/
A Dmt6779-clk.h125 #define CLK_TOP_ADSP 115 macro
A Dmediatek,mt8188-clk.h79 #define CLK_TOP_ADSP 68 macro
A Dmt8195-clk.h100 #define CLK_TOP_ADSP 88 macro
/linux/drivers/clk/mediatek/
A Dclk-mt8188-topckgen.c1122 MUX_GATE_CLR_SET_UPD(CLK_TOP_ADSP, "top_adsp",
A Dclk-mt8195-topckgen.c1091 MUX_GATE_CLR_SET_UPD(CLK_TOP_ADSP, "top_adsp",
A Dclk-mt6779.c760 MUX_GATE_CLR_SET_UPD(CLK_TOP_ADSP, "adsp_sel", adsp_parents,
/linux/arch/arm64/boot/dts/mediatek/
A Dmt8188.dtsi1214 <&topckgen CLK_TOP_ADSP>;
A Dmt8195.dtsi830 clocks = <&topckgen CLK_TOP_ADSP>,
949 clocks = <&topckgen CLK_TOP_ADSP>,

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