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Searched refs:CLK_TOP_DSP5 (Results 1 – 4 of 4) sorted by relevance

/linux/include/dt-bindings/clock/
A Dmediatek,mt8188-clk.h28 #define CLK_TOP_DSP5 17 macro
A Dmt8195-clk.h28 #define CLK_TOP_DSP5 16 macro
/linux/drivers/clk/mediatek/
A Dclk-mt8188-topckgen.c997 MUX_GATE_CLR_SET_UPD(CLK_TOP_DSP5, "top_dsp5",
A Dclk-mt8195-topckgen.c915 MUX_GATE_CLR_SET_UPD(CLK_TOP_DSP5, "top_dsp5",

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