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Searched refs:CLK_TOP_DSP7 (Results 1 – 4 of 4) sorted by relevance

/linux/include/dt-bindings/clock/
A Dmediatek,mt8188-clk.h30 #define CLK_TOP_DSP7 19 macro
A Dmt8195-clk.h30 #define CLK_TOP_DSP7 18 macro
/linux/drivers/clk/mediatek/
A Dclk-mt8188-topckgen.c1001 MUX_GATE_CLR_SET_UPD(CLK_TOP_DSP7, "top_dsp7",
A Dclk-mt8195-topckgen.c919 MUX_GATE_CLR_SET_UPD(CLK_TOP_DSP7, "top_dsp7",

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