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Searched refs:CLK_TOP_SENINF2 (Results 1 – 8 of 8) sorted by relevance

/linux/include/dt-bindings/clock/
A Dmt6779-clk.h150 #define CLK_TOP_SENINF2 140 macro
A Dmt8186-clk.h50 #define CLK_TOP_SENINF2 31 macro
A Dmt8195-clk.h67 #define CLK_TOP_SENINF2 55 macro
/linux/drivers/clk/mediatek/
A Dclk-mt8186-topckgen.c586 MUX_GATE_CLR_SET_UPD(CLK_TOP_SENINF2, "top_seninf2",
A Dclk-mt8195-topckgen.c1007 MUX_GATE_CLR_SET_UPD(CLK_TOP_SENINF2, "top_seninf2",
A Dclk-mt6779.c737 MUX_GATE_CLR_SET_UPD(CLK_TOP_SENINF2, "seninf2_sel",
/linux/arch/arm64/boot/dts/mediatek/
A Dmt8186.dtsi1011 <&topckgen CLK_TOP_SENINF2>,
A Dmt8195.dtsi816 <&topckgen CLK_TOP_SENINF2>;

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