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Searched refs:CLK_TOP_SPI (Results 1 – 21 of 21) sorted by relevance

/linux/include/dt-bindings/clock/
A Dmt7629-clk.h73 #define CLK_TOP_SPI 63 macro
A Dmediatek,mt7981-clk.h58 #define CLK_TOP_SPI 45 macro
A Dmt8516-clk.h100 #define CLK_TOP_SPI 68 macro
A Dmt6765-clk.h94 #define CLK_TOP_SPI 59 macro
A Dmt6779-clk.h17 #define CLK_TOP_SPI 7 macro
A Dmt8186-clk.h30 #define CLK_TOP_SPI 11 macro
A Dmediatek,mt8188-clk.h36 #define CLK_TOP_SPI 25 macro
A Dmt8195-clk.h39 #define CLK_TOP_SPI 27 macro
/linux/drivers/clk/mediatek/
A Dclk-mt7981-topckgen.c68 FACTOR(CLK_TOP_SPI, "spi", "spi_sel", 1, 1),
A Dclk-mt8186-topckgen.c531 MUX_GATE_CLR_SET_UPD(CLK_TOP_SPI, "top_spi",
A Dclk-mt8516.c571 GATE_TOP1(CLK_TOP_SPI, "spi", "spi_sel", 23),
A Dclk-mt7629.c416 FACTOR(CLK_TOP_SPI, "spi", "spi0_sel", 1, 1),
A Dclk-mt8167.c780 GATE_TOP1(CLK_TOP_SPI, "spi", "spi_sel", 23),
A Dclk-mt8188-topckgen.c1015 MUX_GATE_CLR_SET_UPD(CLK_TOP_SPI, "top_spi",
A Dclk-mt8195-topckgen.c939 MUX_GATE_CLR_SET_UPD(CLK_TOP_SPI, "top_spi",
A Dclk-mt6765.c142 FACTOR(CLK_TOP_SPI, "spi_ck", "spi_sel", 1, 1),
A Dclk-mt6779.c686 MUX_GATE_CLR_SET_UPD(CLK_TOP_SPI, "spi_sel", spi_parents,
/linux/arch/arm64/boot/dts/mediatek/
A Dmt8188.dtsi1382 <&topckgen CLK_TOP_SPI>,
1406 <&topckgen CLK_TOP_SPI>,
1419 <&topckgen CLK_TOP_SPI>,
1432 <&topckgen CLK_TOP_SPI>,
1445 <&topckgen CLK_TOP_SPI>,
1458 <&topckgen CLK_TOP_SPI>,
A Dmt8186.dtsi1360 <&topckgen CLK_TOP_SPI>,
1407 <&topckgen CLK_TOP_SPI>,
1420 <&topckgen CLK_TOP_SPI>,
1433 <&topckgen CLK_TOP_SPI>,
1446 <&topckgen CLK_TOP_SPI>,
1459 <&topckgen CLK_TOP_SPI>,
A Dmt8516.dtsi392 <&topckgen CLK_TOP_SPI>;
A Dmt8195.dtsi1114 <&topckgen CLK_TOP_SPI>,
1174 <&topckgen CLK_TOP_SPI>,
1188 <&topckgen CLK_TOP_SPI>,
1202 <&topckgen CLK_TOP_SPI>,
1216 <&topckgen CLK_TOP_SPI>,
1230 <&topckgen CLK_TOP_SPI>,

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