Searched refs:CLK_TOP_SPI0_SEL (Results 1 – 10 of 10) sorted by relevance
| /linux/include/dt-bindings/clock/ |
| A D | mt7629-clk.h | 92 #define CLK_TOP_SPI0_SEL 82 macro
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| A D | mt7622-clk.h | 77 #define CLK_TOP_SPI0_SEL 65 macro
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| A D | mt2701-clk.h | 97 #define CLK_TOP_SPI0_SEL 86 macro
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| /linux/drivers/clk/mediatek/ |
| A D | clk-mt7622.c | 408 MUX_GATE(CLK_TOP_SPI0_SEL, "spi0_sel", spi0_parents,
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| A D | clk-mt7629.c | 482 MUX_GATE(CLK_TOP_SPI0_SEL, "spi0_sel", spi0_parents,
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| A D | clk-mt2701.c | 507 MUX_GATE(CLK_TOP_SPI0_SEL, "spi0_sel", spi_parents,
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| /linux/arch/arm/boot/dts/mediatek/ |
| A D | mt7629.dtsi | 282 <&topckgen CLK_TOP_SPI0_SEL>,
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| A D | mt2701.dtsi | 343 <&topckgen CLK_TOP_SPI0_SEL>,
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| A D | mt7623.dtsi | 488 <&topckgen CLK_TOP_SPI0_SEL>,
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| /linux/arch/arm64/boot/dts/mediatek/ |
| A D | mt7622.dtsi | 499 <&topckgen CLK_TOP_SPI0_SEL>,
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Completed in 22 milliseconds