Searched refs:CLK_TOP_UNIVPLL_D6_D8 (Results 1 – 7 of 7) sorted by relevance
| /linux/include/dt-bindings/clock/ |
| A D | mt8192-clk.h | 110 #define CLK_TOP_UNIVPLL_D6_D8 98 macro
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| A D | mediatek,mt8188-clk.h | 134 #define CLK_TOP_UNIVPLL_D6_D8 123 macro
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| A D | mt8195-clk.h | 167 #define CLK_TOP_UNIVPLL_D6_D8 155 macro
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| /linux/drivers/clk/mediatek/ |
| A D | clk-mt8188-topckgen.c | 58 FACTOR(CLK_TOP_UNIVPLL_D6_D8, "univpll_d6_d8", "univpll_d6", 1, 8),
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| A D | clk-mt8192.c | 56 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D6_D8, "univpll_d6_d8", "univpll_d6", 1, 8, 0),
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| A D | clk-mt8195-topckgen.c | 69 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D6_D8, "univpll_d6_d8", "univpll_d6", 1, 8, 0),
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| /linux/arch/arm64/boot/dts/mediatek/ |
| A D | mt8192-asurada.dtsi | 504 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D6_D8>;
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