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Searched refs:CLK_TOP_VCODECPLL_370P5 (Results 1 – 7 of 7) sorted by relevance

/linux/Documentation/devicetree/bindings/media/
A Dmediatek,vcodec-decoder.yaml181 <&topckgen CLK_TOP_VCODECPLL_370P5>;
195 assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL_370P5>,
A Dmediatek,vcodec-encoder.yaml185 assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL_370P5>;
/linux/include/dt-bindings/clock/
A Dmediatek,mt6795-clk.h86 #define CLK_TOP_VCODECPLL_370P5 75 macro
A Dmt8173-clk.h88 #define CLK_TOP_VCODECPLL_370P5 78 macro
/linux/drivers/clk/mediatek/
A Dclk-mt6795-topckgen.c443 FACTOR(CLK_TOP_VCODECPLL_370P5, "vcodecpll_370p5", "vcodecpll", 1, 4),
A Dclk-mt8173-topckgen.c522 FACTOR(CLK_TOP_VCODECPLL_370P5, "vcodecpll_370p5", "vcodecpll", 1, 4),
/linux/arch/arm64/boot/dts/mediatek/
A Dmt8173.dtsi1405 <&topckgen CLK_TOP_VCODECPLL_370P5>;
1419 assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL_370P5>,
1521 <&topckgen CLK_TOP_VCODECPLL_370P5>;

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