| /linux/arch/x86/crypto/ |
| A D | camellia-x86_64-asm_64.S | 38 #define CTX %rdi macro
140 xorq key_table(CTX), RAB0;
172 xorq key_table(CTX), RCD0; \
202 cmpb $16, key_length(CTX);
233 cmpl $16, key_length(CTX);
342 xorq key_table(CTX), RAB0; \
350 xorq key_table(CTX), RAB1;
398 xorq key_table(CTX), RCD0; \
406 xorq key_table(CTX), RCD1; \
437 cmpb $16, key_length(CTX);
[all …]
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| A D | blowfish-x86_64-asm_64.S | 21 #define CTX %r12 macro
64 movl s0(CTX,RT0,4), RT0d; \
65 addl s1(CTX,RT1,4), RT0d; \
69 xorl s2(CTX,RT1,4), RT0d; \
70 addl s3(CTX,RT2,4), RT0d; \
74 xorq p+4*(n)(CTX), RX0;
110 movq %rdi, CTX;
141 movq %rdi, CTX;
192 movq p+4*(n)(CTX), RKEY;
284 movq %rdi, CTX
[all …]
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| A D | twofish-x86_64-asm_64-3way.S | 24 #define CTX %rdi macro
82 op2##l T1(CTX, tmp1, 4), dst ## d;
120 addl k+4*(2*(n))(CTX), x ## d; \
122 addl k+4*(2*(n)+1)(CTX), y ## d; \
133 addl k+4*(2*(n))(CTX), x ## d; \
177 xorq w+4*m(CTX), xy ## 0; \
180 xorq w+4*m(CTX), xy ## 1; \
183 xorq w+4*m(CTX), xy ## 2;
186 xorq w+4*m(CTX), xy ## 0; \
189 xorq w+4*m(CTX), xy ## 1; \
[all …]
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| A D | camellia-aesni-avx-asm_64.S | 28 #define CTX %rdi macro
214 leaq (key_table + (i) * 8)(CTX), %r9; \
739 ((key_table + (8) * 8) + 0)(CTX),
740 ((key_table + (8) * 8) + 4)(CTX),
741 ((key_table + (8) * 8) + 8)(CTX),
761 cmpl $16, key_length(CTX);
842 ((key_table + (8) * 8) + 8)(CTX),
844 ((key_table + (8) * 8) + 0)(CTX),
895 %xmm15, %rdx, (key_table)(CTX));
918 cmpl $16, key_length(CTX);
[all …]
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| A D | sha256-avx2-asm.S | 95 CTX = %rdi # 1st arg define
101 SRND = CTX # SRND is same register as CTX
549 mov (CTX), a
550 mov 4*1(CTX), b
551 mov 4*2(CTX), c
552 mov 4*3(CTX), d
553 mov 4*4(CTX), e
554 mov 4*5(CTX), f
555 mov 4*6(CTX), g
556 mov 4*7(CTX), h
[all …]
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| A D | camellia-aesni-avx2-asm_64.S | 18 #define CTX %rdi macro
246 leaq (key_table + (i) * 8)(CTX), %r9; \
773 ((key_table + (8) * 8) + 0)(CTX),
774 ((key_table + (8) * 8) + 4)(CTX),
775 ((key_table + (8) * 8) + 8)(CTX),
795 cmpl $16, key_length(CTX);
876 ((key_table + (8) * 8) + 8)(CTX),
878 ((key_table + (8) * 8) + 0)(CTX),
931 %ymm15, %rdx, (key_table)(CTX));
958 cmpl $16, key_length(CTX);
[all …]
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| A D | twofish-avx-x86_64-asm_64.S | 35 #define CTX %rdi macro
90 movl t0(CTX, RID1, 4), dst ## d; \
91 movl t1(CTX, RID2, 4), RID2d; \
96 xorl t2(CTX, RID1, 4), dst ## d; \
97 xorl t3(CTX, RID2, 4), dst ## d;
173 vbroadcastss (k+4*(2*(n)))(CTX), RK1; \
174 vbroadcastss (k+4*(2*(n)+1))(CTX), RK2; \
239 vmovdqu w(CTX), RK1;
260 vmovdqu (w+4*4)(CTX), RK1;
280 vmovdqu (w+4*4)(CTX), RK1;
[all …]
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| A D | cast5-avx-x86_64-asm_64.S | 35 #define CTX %r15 macro
150 vbroadcastss (km+(4*n))(CTX), RKM; \
160 vpxor kr(CTX), RKR, RKR;
240 movq %rdi, CTX;
265 movzbl rr(CTX), %eax;
313 movq %rdi, CTX;
325 movzbl rr(CTX), %eax;
373 movq %rdi, CTX;
411 movq %rdi, CTX;
449 movq %rdi, CTX;
[all …]
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| A D | sha256-avx-asm.S | 368 mov 4*0(CTX), a
369 mov 4*1(CTX), b
370 mov 4*2(CTX), c
371 mov 4*3(CTX), d
372 mov 4*4(CTX), e
373 mov 4*5(CTX), f
374 mov 4*6(CTX), g
375 mov 4*7(CTX), h
438 addm (4*0)(CTX),a
439 addm (4*1)(CTX),b
[all …]
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| A D | sha256-ssse3-asm.S | 377 mov 4*0(CTX), a
378 mov 4*1(CTX), b
379 mov 4*2(CTX), c
380 mov 4*3(CTX), d
381 mov 4*4(CTX), e
382 mov 4*5(CTX), f
383 mov 4*6(CTX), g
384 mov 4*7(CTX), h
451 addm (4*0)(CTX),a
452 addm (4*1)(CTX),b
[all …]
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| A D | cast6-avx-x86_64-asm_64.S | 35 #define CTX %r15 macro
150 vbroadcastss (km+(4*(nn)))(CTX), RKM; \
187 vpxor (kr+n*16)(CTX), RKR, RKR; \
263 movq %rdi, CTX;
311 movq %rdi, CTX;
355 movq %rdi, CTX;
378 movq %rdi, CTX;
402 movq %rdi, CTX;
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| /linux/drivers/gpu/drm/amd/display/dmub/src/ |
| A D | dmub_reg.h | 51 #define REG_READ(reg) ((CTX)->funcs.reg_read((CTX)->user_ctx, REG(reg)))
54 ((CTX)->funcs.reg_write((CTX)->user_ctx, REG(reg), (val)))
59 dmub_reg_set(CTX, REG(reg_name), initial_val, n, __VA_ARGS__)
86 dmub_reg_update(CTX, REG(reg_name), n, __VA_ARGS__)
112 dmub_reg_get(CTX, REG(reg_name), FN(reg_name, field), val)
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| /linux/drivers/gpu/drm/amd/display/dc/inc/ |
| A D | reg_helper.h | 40 dm_read_reg(CTX, REG(reg_name))
43 dm_write_reg(CTX, REG(reg_name), value)
55 generic_reg_set_ex(CTX, \
157 generic_reg_get(CTX, REG(reg_name), \
161 generic_reg_get2(CTX, REG(reg_name), \
166 generic_reg_get3(CTX, REG(reg_name), \
219 generic_reg_wait(CTX, \
226 generic_reg_update_ex(CTX, \
544 reg_sequence_start_gather(CTX)
548 reg_sequence_start_execute(CTX)
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/ |
| A D | dcn315_smu.c | 75 CTX->logger
156 generic_write_indirect_reg(CTX, in dcn315_smu_send_msg_with_param()
159 read_back_data = generic_read_indirect_reg(CTX, in dcn315_smu_send_msg_with_param()
172 dm_helpers_smu_timeout(CTX, msg_id, param, 10 * 200000); in dcn315_smu_send_msg_with_param()
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| /linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
| A D | dcn20_vmid.c | 34 #define CTX \ macro
42 CTX->logger
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| /linux/drivers/gpu/drm/amd/display/dc/hubbub/dcn301/ |
| A D | dcn301_hubbub.c | 33 #define CTX \ macro
43 #define CTX \ macro
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| /linux/drivers/gpu/drm/amd/display/dc/dio/dcn321/ |
| A D | dcn321_dio_link_encoder.c | 41 #define CTX \ macro
57 dm_read_reg(CTX, AUX_REG(reg_name))
60 dm_write_reg(CTX, AUX_REG(reg_name), val)
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| /linux/drivers/gpu/drm/amd/display/dc/hubbub/dcn201/ |
| A D | dcn201_hubbub.c | 36 #define CTX \ macro
46 #define CTX \ macro
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| /linux/drivers/gpu/drm/amd/display/dc/dio/dcn30/ |
| A D | dcn30_dio_link_encoder.c | 35 #define CTX \ macro
212 dm_read_reg(CTX, AUX_REG(reg_name))
215 dm_write_reg(CTX, AUX_REG(reg_name), val)
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| /linux/arch/sparc/kernel/ |
| A D | sun4v_tlb_miss.S | 11 #define LOAD_ITLB_INFO(BASE, VADDR, CTX) \ argument
13 ldx [BASE + HV_FAULT_I_CTX_OFFSET], CTX;
16 #define LOAD_DTLB_INFO(BASE, VADDR, CTX) \ argument
18 ldx [BASE + HV_FAULT_D_CTX_OFFSET], CTX;
24 #define COMPUTE_TAG_TARGET(DEST, VADDR, CTX, ZERO_CTX_LABEL) \ argument
26 brz,pn CTX, ZERO_CTX_LABEL; \
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| /linux/drivers/gpu/drm/amd/display/dc/dio/dcn401/ |
| A D | dcn401_dio_link_encoder.c | 43 #define CTX \ macro
59 dm_read_reg(CTX, AUX_REG(reg_name))
62 dm_write_reg(CTX, AUX_REG(reg_name), val)
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| /linux/drivers/gpu/drm/amd/display/dc/dio/dcn32/ |
| A D | dcn32_dio_link_encoder.c | 44 #define CTX \ macro
60 dm_read_reg(CTX, AUX_REG(reg_name))
63 dm_write_reg(CTX, AUX_REG(reg_name), val)
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/ |
| A D | rn_clk_mgr_vbios_smu.c | 49 CTX->logger
127 dm_helpers_smu_timeout(CTX, msg_id, param, 10 * 200000); in rn_vbios_smu_send_msg_with_param()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/ |
| A D | dcn301_smu.c | 48 CTX->logger
126 dm_helpers_smu_timeout(CTX, msg_id, param, 10 * 200000); in dcn301_smu_send_msg_with_param()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn301/ |
| A D | dcn301_hwseq.c | 33 #define CTX \ macro
|