Home
last modified time | relevance | path

Searched refs:DG1_MSTR_IRQ (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/xe/regs/
A Dxe_regs.h61 #define DG1_MSTR_IRQ REG_BIT(31) macro
/linux/drivers/gpu/drm/xe/
A Dxe_irq.c399 xe_mmio_write32(mmio, DG1_MSTR_TILE_INTR, DG1_MSTR_IRQ); in dg1_intr_enable()
/linux/drivers/gpu/drm/i915/
A Di915_irq.c614 raw_reg_write(regs, DG1_MSTR_TILE_INTR, DG1_MSTR_IRQ); in dg1_master_intr_enable()
A Di915_reg.h2609 #define DG1_MSTR_IRQ REG_BIT(31) macro

Completed in 34 milliseconds