| /linux/drivers/gpu/drm/amd/display/dc/dio/dcn314/ |
| A D | dcn314_dio_stream_encoder.c | 121 REG_UPDATE(DIG_CLOCK_PATTERN, DIG_CLOCK_PATTERN, 0x1F); in enc314_stream_encoder_dvi_set_stream_attribute()
161 REG_UPDATE(DIG_CLOCK_PATTERN, DIG_CLOCK_PATTERN, 0x1F); in enc314_stream_encoder_hdmi_set_stream_attribute()
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| A D | dcn314_dio_stream_encoder.h | 109 SRI(DIG_CLOCK_PATTERN, DIG, id), \
258 SE_SF(DIG0_DIG_CLOCK_PATTERN, DIG_CLOCK_PATTERN, mask_sh),\
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| /linux/drivers/gpu/drm/amd/display/dc/dio/dcn32/ |
| A D | dcn32_dio_stream_encoder.c | 88 REG_UPDATE(DIG_CLOCK_PATTERN, DIG_CLOCK_PATTERN, 0x1F); in enc32_stream_encoder_dvi_set_stream_attribute()
128 REG_UPDATE(DIG_CLOCK_PATTERN, DIG_CLOCK_PATTERN, 0x1F); in enc32_stream_encoder_hdmi_set_stream_attribute()
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| A D | dcn32_dio_stream_encoder.h | 179 SE_SF(DIG0_DIG_CLOCK_PATTERN, DIG_CLOCK_PATTERN, mask_sh),\
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| /linux/drivers/gpu/drm/amd/display/dc/dio/dcn35/ |
| A D | dcn35_dio_stream_encoder.c | 76 REG_UPDATE(DIG_CLOCK_PATTERN, DIG_CLOCK_PATTERN, 0x1F); in enc35_stream_encoder_dvi_set_stream_attribute()
115 REG_UPDATE(DIG_CLOCK_PATTERN, DIG_CLOCK_PATTERN, 0x1F); in enc35_stream_encoder_hdmi_set_stream_attribute()
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| A D | dcn35_dio_stream_encoder.h | 109 SRI(DIG_CLOCK_PATTERN, DIG, id), \
267 SE_SF(DIG0_DIG_CLOCK_PATTERN, DIG_CLOCK_PATTERN, mask_sh),\
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| A D | dcn35_dio_link_encoder.h | 44 LE_SF(DIG0_DIG_CLOCK_PATTERN, DIG_CLOCK_PATTERN, mask_sh),\
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| /linux/drivers/gpu/drm/amd/display/dc/dio/dcn401/ |
| A D | dcn401_dio_stream_encoder.c | 88 REG_UPDATE(DIG_CLOCK_PATTERN, DIG_CLOCK_PATTERN, 0x1F); in enc401_stream_encoder_dvi_set_stream_attribute()
128 REG_UPDATE(DIG_CLOCK_PATTERN, DIG_CLOCK_PATTERN, 0x1F); in enc401_stream_encoder_hdmi_set_stream_attribute()
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| A D | dcn401_dio_link_encoder.h | 43 LE_SF(DIG0_DIG_CLOCK_PATTERN, DIG_CLOCK_PATTERN, mask_sh),\
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| A D | dcn401_dio_stream_encoder.h | 184 SE_SF(DIG0_DIG_CLOCK_PATTERN, DIG_CLOCK_PATTERN, mask_sh),\
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| /linux/drivers/gpu/drm/amd/display/dc/dio/dcn30/ |
| A D | dcn30_dio_stream_encoder.c | 553 REG_UPDATE(DIG_CLOCK_PATTERN, DIG_CLOCK_PATTERN, 0x1F); in enc3_stream_encoder_dvi_set_stream_attribute()
599 REG_UPDATE(DIG_CLOCK_PATTERN, DIG_CLOCK_PATTERN, 0x1F); in enc3_stream_encoder_hdmi_set_stream_attribute()
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| A D | dcn30_dio_stream_encoder.h | 112 SRI(DIG_CLOCK_PATTERN, DIG, id)
275 SE_SF(DIG0_DIG_CLOCK_PATTERN, DIG_CLOCK_PATTERN, mask_sh)
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| /linux/drivers/gpu/drm/amd/display/dc/dio/dcn10/ |
| A D | dcn10_link_encoder.h | 45 SRI(DIG_CLOCK_PATTERN, DIG, id), \
87 uint32_t DIG_CLOCK_PATTERN; member
182 LE_SF(DIG0_DIG_CLOCK_PATTERN, DIG_CLOCK_PATTERN, mask_sh),\
233 type DIG_CLOCK_PATTERN;\
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| A D | dcn10_stream_encoder.h | 99 SRI(DIG_CLOCK_PATTERN, DIG, id)
188 uint32_t DIG_CLOCK_PATTERN; member
343 SE_SF(DIG0_DIG_CLOCK_PATTERN, DIG_CLOCK_PATTERN, mask_sh)
525 type DIG_CLOCK_PATTERN
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| A D | dcn10_link_encoder.c | 967 REG_UPDATE(DIG_CLOCK_PATTERN, DIG_CLOCK_PATTERN, 0x1F); in dcn10_link_encoder_enable_tmds_output_with_clk_pattern_wa()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn35/ |
| A D | dcn35_resource.h | 141 SRI_ARR(DIG_CLOCK_PATTERN, DIG, id), \
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn401/ |
| A D | dcn401_resource.h | 221 SRI_ARR(DIG_CLOCK_PATTERN, DIG, id), \
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| A D | dcn32_resource.h | 303 SRI_ARR(DIG_FE_CNTL, DIG, id), SRI_ARR(DIG_CLOCK_PATTERN, DIG, id), \
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