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Searched refs:DPIO_CH0 (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/i915/
A Dintel_gvt_mmio_table.c1174 MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 0)); in iterate_bxt_mmio()
1175 MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 1)); in iterate_bxt_mmio()
1176 MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 2)); in iterate_bxt_mmio()
1177 MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 3)); in iterate_bxt_mmio()
1178 MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 6)); in iterate_bxt_mmio()
1179 MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 8)); in iterate_bxt_mmio()
1180 MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 9)); in iterate_bxt_mmio()
1224 MMIO_D(BXT_PORT_PLL(DPIO_PHY1, DPIO_CH0, 0)); in iterate_bxt_mmio()
1225 MMIO_D(BXT_PORT_PLL(DPIO_PHY1, DPIO_CH0, 1)); in iterate_bxt_mmio()
1226 MMIO_D(BXT_PORT_PLL(DPIO_PHY1, DPIO_CH0, 2)); in iterate_bxt_mmio()
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/linux/drivers/gpu/drm/i915/display/
A Dintel_display_power_well.c1331 PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH0, 0) | in assert_chv_phy_status()
1332 PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH0, 1) | in assert_chv_phy_status()
1339 PHY_STATUS_SPLINE_LDO(DPIO_PHY1, DPIO_CH0, 0) | in assert_chv_phy_status()
1340 PHY_STATUS_SPLINE_LDO(DPIO_PHY1, DPIO_CH0, 1)); in assert_chv_phy_status()
1354 PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH0) | in assert_chv_phy_status()
1356 phy_status |= PHY_STATUS_CMN_LDO(DPIO_PHY0, DPIO_CH0); in assert_chv_phy_status()
1369 PHY_CH_POWER_DOWN_OVRD(0x3, DPIO_PHY0, DPIO_CH0))) in assert_chv_phy_status()
1372 PHY_CH_POWER_DOWN_OVRD(0xc, DPIO_PHY0, DPIO_CH0))) in assert_chv_phy_status()
1392 phy_status |= PHY_STATUS_CMN_LDO(DPIO_PHY1, DPIO_CH0); in assert_chv_phy_status()
1530 if (ch == DPIO_CH0) in assert_chv_phy_powergate()
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A Dintel_dpio_phy.c173 [DPIO_CH0] = { .port = PORT_B },
183 [DPIO_CH0] = { .port = PORT_A },
196 [DPIO_CH0] = { .port = PORT_B },
206 [DPIO_CH0] = { .port = PORT_A },
216 [DPIO_CH0] = { .port = PORT_C },
256 *ch = DPIO_CH0; in bxt_port_to_phy_channel()
271 *ch = DPIO_CH0; in bxt_port_to_phy_channel()
668 return DPIO_CH0; in vlv_dig_port_to_channel()
710 return DPIO_CH0; in vlv_pipe_to_channel()
889 if (ch == DPIO_CH0) in chv_phy_pre_pll_enable()
[all …]
A Dintel_dpio_phy.h19 DPIO_CH0, enumerator
114 return DPIO_CH0; in vlv_dig_port_to_channel()
126 return DPIO_CH0; in vlv_pipe_to_channel()
A Dintel_display_power.c1759 PHY_CH_POWER_MODE(PHY_CH_DEEP_PSR, DPIO_PHY0, DPIO_CH0) | in chv_phy_control_init()
1761 PHY_CH_POWER_MODE(PHY_CH_DEEP_PSR, DPIO_PHY1, DPIO_CH0); in chv_phy_control_init()
1779 PHY_CH_POWER_DOWN_OVRD_EN(DPIO_PHY0, DPIO_CH0); in chv_phy_control_init()
1782 PHY_CH_POWER_DOWN_OVRD(mask, DPIO_PHY0, DPIO_CH0); in chv_phy_control_init()
1811 PHY_CH_POWER_DOWN_OVRD_EN(DPIO_PHY1, DPIO_CH0); in chv_phy_control_init()
1814 PHY_CH_POWER_DOWN_OVRD(mask, DPIO_PHY1, DPIO_CH0); in chv_phy_control_init()
/linux/drivers/gpu/drm/i915/gvt/
A Dhandlers.c546 enum dpio_channel ch = DPIO_CH0; in bxt_vgpu_get_dp_bitrate()
554 ch = DPIO_CH0; in bxt_vgpu_get_dp_bitrate()
558 ch = DPIO_CH0; in bxt_vgpu_get_dp_bitrate()
2772 MMIO_DH(BXT_PORT_PCS_DW12_GRP(DPIO_PHY0, DPIO_CH0), D_BXT, in init_bxt_mmio_info()
2774 MMIO_DH(BXT_PORT_TX_DW3_LN(DPIO_PHY0, DPIO_CH0, 0), D_BXT, in init_bxt_mmio_info()
2780 MMIO_DH(BXT_PORT_PCS_DW12_GRP(DPIO_PHY1, DPIO_CH0), D_BXT, in init_bxt_mmio_info()
2782 MMIO_DH(BXT_PORT_TX_DW3_LN(DPIO_PHY1, DPIO_CH0, 0), D_BXT, in init_bxt_mmio_info()

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