| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| A D | display_mode_vba_util_32.h | 224 bool DSCEnable,
267 bool DSCEnable,
297 bool DSCEnable,
310 bool DSCEnable,
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| A D | display_mode_vba_util_32.c | 1189 bool DSCEnable, in dml32_CalculateODMMode() argument
1232 (DSCEnable && (HActive > 2 * MaximumPixelsPerLinePerDSCUnit)) in dml32_CalculateODMMode()
1244 (DSCEnable && (HActive > MaximumPixelsPerLinePerDSCUnit)) in dml32_CalculateODMMode()
1354 bool DSCEnable, in dml32_CalculateOutputLink() argument
1386 if (DSCEnable == true) { in dml32_CalculateOutputLink()
1580 bool DSCEnable, in dml32_TruncToValidBPP() argument
1631 } else if (DSCEnable && Output == dm_dp) { in dml32_TruncToValidBPP()
1637 if (DSCEnable) { in dml32_TruncToValidBPP()
1656 if (DSCEnable) { in dml32_TruncToValidBPP()
1684 bool DSCEnable, in dml32_RequiredDTBCLK() argument
[all …]
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| A D | display_mode_vba_32.c | 2105 mode_lib->vba.DSCEnable[k], in dml32_ModeSupportAndSystemConfigurationFull()
2361 if (mode_lib->vba.DSCEnable[k] && mode_lib->vba.ForcedOutputLinkBPP[k] != 0) in dml32_ModeSupportAndSystemConfigurationFull()
2363 if (mode_lib->vba.DSCEnable[k] && mode_lib->vba.OutputFormat[k] == dm_n422 in dml32_ModeSupportAndSystemConfigurationFull()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2/ |
| A D | dml2_utils.c | 125 dml_output_array->DSCEnable[dst_index] = dml_output_array->DSCEnable[src_index]; in dml2_util_copy_dml_output()
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| A D | display_mode_core.c | 91 enum dml_dsc_enable DSCEnable,
111 dml_bool_t DSCEnable,
380 dml_bool_t DSCEnable,
442 dml_bool_t DSCEnable,
2711 dml_bool_t DSCEnable, in TruncToValidBPP() argument
2770 if (DSCEnable) { in TruncToValidBPP()
2791 if (DSCEnable) { in TruncToValidBPP()
4574 dml_bool_t DSCEnable, in RequiredDTBCLK() argument
4584 if (DSCEnable != true) { in RequiredDTBCLK()
5357 enum dml_dsc_enable DSCEnable, in CalculateOutputLink() argument
[all …]
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| A D | display_mode_core_structs.h | 571 …enum dml_dsc_enable DSCEnable[__DML_NUM_PLANES__]; //< brief for mode support check; use to determ… member
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| A D | dml2_translation_helper.c | 740 out->DSCEnable[location] = (enum dml_dsc_enable)in->timing.flags.DSC; in populate_dml_output_cfg_from_stream_state()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/ |
| A D | dml2_core_shared.c | 123 bool DSCEnable,
376 bool DSCEnable,
405 enum dml2_dsc_enable_option DSCEnable,
428 bool DSCEnable,
3964 bool DSCEnable, in TruncToValidBPP() argument
4030 if (DSCEnable) { in TruncToValidBPP()
6557 bool DSCEnable, in CalculateODMMode() argument
6719 if (DSCEnable == dml2_dsc_enable) { in CalculateOutputLink()
6832 if (DSCEnable == dml2_dsc_enable) { in CalculateOutputLink()
6920 bool DSCEnable, in RequiredDTBCLK() argument
[all …]
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| A D | dml2_core_dcn4_calcs.c | 1287 bool DSCEnable, in TruncToValidBPP() argument
1340 } else if (DSCEnable && Output == dml2_dp) { in TruncToValidBPP()
1346 ODMMode = DSCEnable ? ODMModeDSC : ODMModeNoDSC; in TruncToValidBPP()
1353 if (DSCEnable) { in TruncToValidBPP()
4068 bool DSCEnable, in CalculateODMMode() argument
4090 bool UseDSC = DSCEnable && (NumberOfDSCSlices > 0); in CalculateODMMode()
4176 enum dml2_dsc_enable_option DSCEnable, in CalculateOutputLink() argument
4219 if (DSCEnable == dml2_dsc_enable) { in CalculateOutputLink()
4332 if (DSCEnable == dml2_dsc_enable) { in CalculateOutputLink()
4420 bool DSCEnable, in RequiredDTBCLK() argument
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| A D | display_mode_vba_31.c | 3590 bool DSCEnable, argument
3633 if (DSCEnable && Output == dm_dp) {
3646 if (DSCEnable) {
3666 …if (!((DSCEnable == false && (DesiredBPP == NonDSCBPP2 || DesiredBPP == NonDSCBPP1 || DesiredBPP <…
3667 || (DSCEnable && DesiredBPP >= MinDSCBPP && DesiredBPP <= MaxDSCBPP))) {
4312 if (v->DSCEnable[k] == true) {
4349 v->DSCEnable[k] == true && v->ForcedOutputLinkBPP[k] == 0) {
4391 v->DSCEnable[k] == true && v->ForcedOutputLinkBPP[k] == 0) {
4432 if (v->Outbpp == BPP_INVALID && v->DSCEnable[k] == true &&
4547 if (v->DSCEnable[k] == true && v->OutputFormat[k] == dm_n422
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| A D | display_mode_vba_314.c | 3696 bool DSCEnable, argument
3739 if (DSCEnable && Output == dm_dp) {
3752 if (DSCEnable) {
3772 …if (!((DSCEnable == false && (DesiredBPP == NonDSCBPP2 || DesiredBPP == NonDSCBPP1 || DesiredBPP <…
3773 || (DSCEnable && DesiredBPP >= MinDSCBPP && DesiredBPP <= MaxDSCBPP))) {
4399 if (v->DSCEnable[k] == true) {
4436 v->DSCEnable[k] == true && v->ForcedOutputLinkBPP[k] == 0) {
4478 v->DSCEnable[k] == true && v->ForcedOutputLinkBPP[k] == 0) {
4519 if (v->Outbpp == BPP_INVALID && v->DSCEnable[k] == true &&
4634 if (v->DSCEnable[k] == true && v->OutputFormat[k] == dm_n422
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| /linux/drivers/gpu/drm/amd/display/dc/dml/ |
| A D | display_mode_vba.h | 1072 bool DSCEnable[DC__NUM_DPP__MAX]; member
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| A D | display_mode_vba.c | 648 mode_lib->vba.DSCEnable[mode_lib->vba.NumberOfActivePlanes] = dout->dsc_enable; in fetch_pipe_params()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| A D | display_mode_vba_30.c | 3455 bool DSCEnable, in TruncToValidBPP() argument
3497 if (DSCEnable && Output == dm_dp) { in TruncToValidBPP()
3511 if (DSCEnable) { in TruncToValidBPP()
3531 …if (!((DSCEnable == false && (DesiredBPP == NonDSCBPP2 || DesiredBPP == NonDSCBPP1 || DesiredBPP =… in TruncToValidBPP()
3532 (DSCEnable && DesiredBPP >= MinDSCBPP && DesiredBPP <= MaxDSCBPP))) { in TruncToValidBPP()
4077 if (v->DSCEnable[k] == true) { in dml30_ModeSupportAndSystemConfigurationFull()
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