| /linux/drivers/gpu/drm/amd/display/dc/dml2/ |
| A D | dml2_wrapper.c | 71 in_out_display_cfg->hw.DSCEnabled[i] = mode_support_info->DSCEnabled[i]; in map_hw_resources()
209 p->cur_display_config->output.OutputEncoder[0], p->cur_mode_support_info->DSCEnabled[0]) - 1; in optimize_configuration()
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| A D | display_mode_core_structs.h | 602 …dml_bool_t DSCEnabled[__DML_NUM_PLANES__]; /// <brief Indicate if the DSC is enabled; used in mode… member
737 …dml_bool_t DSCEnabled[__DML_NUM_PLANES__]; /// <brief Indicate if the DSC is actually required; us… member
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| A D | display_mode_util.c | 615 dml_print("DML: hw_resource: plane=%d, DSCEnabled = %d\n", i, hw->DSCEnabled[i]); in dml_print_dml_display_cfg_hw_resource()
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| A D | display_mode_core.c | 734 dml_bool_t DSCEnabled,
5869 dml_bool_t DSCEnabled, in DSCDelayRequirement() argument
5883 if (DSCEnabled == true && OutputBpp != 0) { in DSCDelayRequirement()
5901 dml_print("DML::%s: DSCEnabled = %u\n", __func__, DSCEnabled); in DSCDelayRequirement()
8248 mode_lib->ms.support.DSCEnabled[k] = mode_lib->ms.RequiresDSC[k]; in dml_core_mode_support()
8581 …display_cfg.plane.BlendingAndTiming[k] != k) || !mode_lib->ms.cache_display_cfg.hw.DSCEnabled[k]) { in dml_core_mode_programming()
8603 locals->DSCDelay[k] = DSCDelayRequirement(mode_lib->ms.cache_display_cfg.hw.DSCEnabled[k], in dml_core_mode_programming()
8618 …che_display_cfg.plane.BlendingAndTiming[k] == j && mode_lib->ms.cache_display_cfg.hw.DSCEnabled[j]) in dml_core_mode_programming()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/ |
| A D | dml_top_types.h | 355 …bool DSCEnabled[DML2_MAX_PLANES]; /// <brief Indicate if the DSC is actually required; used in mod… member
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| A D | display_mode_vba_util_32.h | 320 unsigned int dml32_DSCDelayRequirement(bool DSCEnabled,
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| A D | display_mode_vba_32.c | 336 if ((mode_lib->vba.BlendingAndTiming[k] != k) || !mode_lib->vba.DSCEnabled[k]) { in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
364 v->DSCDelay[k] = dml32_DSCDelayRequirement(mode_lib->vba.DSCEnabled[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
375 if (j != k && mode_lib->vba.BlendingAndTiming[k] == j && mode_lib->vba.DSCEnabled[j]) in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3748 mode_lib->vba.DSCEnabled[k] = mode_lib->vba.RequiresDSC[mode_lib->vba.VoltageLevel][k]; in dml32_ModeSupportAndSystemConfigurationFull()
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| A D | display_mode_vba_util_32.c | 1713 unsigned int dml32_DSCDelayRequirement(bool DSCEnabled, in dml32_DSCDelayRequirement() argument
1728 if (DSCEnabled == true && OutputBpp != 0) { in dml32_DSCDelayRequirement()
1753 dml_print("DML::%s: DSCEnabled = %d\n", __func__, DSCEnabled); in dml32_DSCDelayRequirement()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| A D | display_mode_vba_20v2.c | 1813 if ((mode_lib->vba.BlendingAndTiming[k] != k) || !mode_lib->vba.DSCEnabled[k]) { in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1844 if (mode_lib->vba.DSCEnabled[k] && bpp != 0) { in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1884 && mode_lib->vba.DSCEnabled[j]) in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3267 bool DSCEnabled, in TruncToValidBPP() argument
3304 if (DSCEnabled) { in TruncToValidBPP()
4017 } else if (locals->DSCEnabled[k] && (locals->HActive[k] > DCN20_MAX_DSC_IMAGE_WIDTH)) { in dml20v2_ModeSupportAndSystemConfigurationFull()
4205 if (mode_lib->vba.DSCEnabled[k] == true) { in dml20v2_ModeSupportAndSystemConfigurationFull()
4236 if (mode_lib->vba.DSCEnabled[k] == true) { in dml20v2_ModeSupportAndSystemConfigurationFull()
4269 if (mode_lib->vba.DSCEnabled[k] == true || mode_lib->vba.Outbpp == BPP_INVALID) { in dml20v2_ModeSupportAndSystemConfigurationFull()
5229 mode_lib->vba.DSCEnabled[k] = in dml20v2_ModeSupportAndSystemConfigurationFull()
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| A D | display_mode_vba_20.c | 1777 if ((mode_lib->vba.BlendingAndTiming[k] != k) || !mode_lib->vba.DSCEnabled[k]) { in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1808 if (mode_lib->vba.DSCEnabled[k] && bpp != 0) { in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1848 && mode_lib->vba.DSCEnabled[j]) in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3193 bool DSCEnabled, in TruncToValidBPP() argument
3230 if (DSCEnabled) { in TruncToValidBPP()
4088 if (mode_lib->vba.DSCEnabled[k] == true) { in dml20_ModeSupportAndSystemConfigurationFull()
4117 if (mode_lib->vba.DSCEnabled[k] == true) { in dml20_ModeSupportAndSystemConfigurationFull()
4148 if (mode_lib->vba.DSCEnabled[k] == true || mode_lib->vba.Outbpp == BPP_INVALID) { in dml20_ModeSupportAndSystemConfigurationFull()
5113 mode_lib->vba.DSCEnabled[k] = in dml20_ModeSupportAndSystemConfigurationFull()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
| A D | display_mode_vba_21.c | 1769 if ((mode_lib->vba.BlendingAndTiming[k] != k) || !mode_lib->vba.DSCEnabled[k]) { in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1800 if (mode_lib->vba.DSCEnabled[k] && bpp != 0) { in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1840 && mode_lib->vba.DSCEnabled[j]) in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3273 bool DSCEnabled, in TruncToValidBPP() argument
3310 if (DSCEnabled) { in TruncToValidBPP()
4111 } else if (locals->DSCEnabled[k] && (locals->HActive[k] > DCN21_MAX_DSC_IMAGE_WIDTH)) { in dml21_ModeSupportAndSystemConfigurationFull()
4299 if (mode_lib->vba.DSCEnabled[k] == true) { in dml21_ModeSupportAndSystemConfigurationFull()
4330 if (mode_lib->vba.DSCEnabled[k] == true) { in dml21_ModeSupportAndSystemConfigurationFull()
4363 if (mode_lib->vba.DSCEnabled[k] == true || mode_lib->vba.Outbpp == BPP_INVALID) { in dml21_ModeSupportAndSystemConfigurationFull()
5235 mode_lib->vba.DSCEnabled[k] = in dml21_ModeSupportAndSystemConfigurationFull()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/ |
| A D | dml2_core_dcn4.c | 509 …pport_info[stream_index].dsc_enable = l->mode_support_ex_params.out_evaluation_info->DSCEnabled[i]; in core_dcn4_mode_support()
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| A D | dml2_core_shared_types.h | 275 …bool DSCEnabled[DML2_MAX_PLANES]; /// <brief Indicate if the DSC is actually required; used in mod… member
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| A D | dml2_core_shared.c | 438 bool DSCEnabled,
2823 mode_lib->ms.support.DSCEnabled[k] = mode_lib->ms.RequiresDSC[k]; in dml2_core_shared_mode_support()
2831 dml2_printf("DML::%s: k=%d, DSCEnabled = %u\n", __func__, k, mode_lib->ms.support.DSCEnabled[k]); in dml2_core_shared_mode_support()
6943 bool DSCEnabled, in DSCDelayRequirement() argument
6958 if (DSCEnabled == true && OutputBpp != 0) { in DSCDelayRequirement()
6977 dml2_printf("DML::%s: DSCEnabled= %u\n", __func__, DSCEnabled); in DSCDelayRequirement()
12131 out->informative.mode_support_info.DSCEnabled[k] = mode_lib->ms.support.DSCEnabled[k]; in dml2_core_shared_get_informative()
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| A D | dml2_core_dcn4_calcs.c | 4443 bool DSCEnabled, in DSCDelayRequirement() argument
4458 if (DSCEnabled == true && OutputBpp != 0) { in DSCDelayRequirement()
4477 dml2_printf("DML::%s: DSCEnabled= %u\n", __func__, DSCEnabled); in DSCDelayRequirement()
9191 mode_lib->ms.support.DSCEnabled[k] = mode_lib->ms.RequiresDSC[k]; in dml_core_mode_support()
9199 dml2_printf("DML::%s: k=%d, DSCEnabled = %u\n", __func__, k, mode_lib->ms.support.DSCEnabled[k]); in dml_core_mode_support()
12595 out->informative.mode_support_info.DSCEnabled[k] = mode_lib->ms.support.DSCEnabled[k]; in dml2_core_calcs_get_informative()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/ |
| A D | display_mode_vba.h | 508 bool DSCEnabled[DC__NUM_DPP__MAX]; member
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| A D | display_mode_vba.c | 647 mode_lib->vba.DSCEnabled[mode_lib->vba.NumberOfActivePlanes] = dout->dsc_enable; in fetch_pipe_params()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| A D | display_mode_vba_30.c | 2108 if ((v->BlendingAndTiming[k] != k) || !v->DSCEnabled[k]) { in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2135 if (v->DSCEnabled[k] && BPP != 0) { in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2170 && v->DSCEnabled[j]) in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3901 if (v->DSCEnabled[k] && v->HActive[k] > DCN30_MAX_DSC_IMAGE_WIDTH in dml30_ModeSupportAndSystemConfigurationFull()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| A D | display_mode_vba_31.c | 2229 if ((v->BlendingAndTiming[k] != k) || !v->DSCEnabled[k]) {
2256 if (v->DSCEnabled[k] && BPP != 0) {
2292 if (j != k && v->BlendingAndTiming[k] == j && v->DSCEnabled[j])
4116 if (v->DSCEnabled[k] && v->HActive[k] > DCN31_MAX_DSC_IMAGE_WIDTH
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| A D | display_mode_vba_314.c | 2247 if ((v->BlendingAndTiming[k] != k) || !v->DSCEnabled[k]) {
2274 if (v->DSCEnabled[k] && BPP != 0) {
2311 if (j != k && v->BlendingAndTiming[k] == j && v->DSCEnabled[j])
4206 if (v->DSCEnabled[k] && v->HActive[k] > DCN314_MAX_DSC_IMAGE_WIDTH
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