Searched refs:FXP_Q4_FMT (Results 1 – 8 of 8) sorted by relevance
| /linux/include/drm/ |
| A D | drm_fixed.h | 238 #define FXP_Q4_FMT "%d.%04d" macro
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| /linux/drivers/gpu/drm/display/ |
| A D | drm_dsc_helper.c | 1491 "dsc-cfg: color-depth: uncompressed-bpc=%d, compressed-bpp=" FXP_Q4_FMT " line-buf-bpp=%d\n", in drm_dsc_dump_config_main_params()
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| A D | drm_dp_helper.c | 4201 DRM_DEBUG_KMS("Invalid BW overhead params: lane_count %d, hactive %d, bpp_x16 " FXP_Q4_FMT "\n", in drm_dp_bw_overhead()
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| /linux/drivers/gpu/drm/i915/display/ |
| A D | intel_vdsc.c | 978 "dsc-dss: compressed-bpp:" FXP_Q4_FMT ", slice-count: %d, split: %s\n", in intel_vdsc_dump_state()
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| A D | intel_audio.c | 456 "h_active = %u link_clk = %u : lanes = %u vdsc_bpp = " FXP_Q4_FMT " cdclk = %u\n", in calc_hblank_early_prog()
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| A D | intel_dp.c | 2381 "Compressed BPP = " FXP_Q4_FMT "\n", in intel_dp_dsc_compute_config()
2389 "Compressed Bpp = " FXP_Q4_FMT " Slice Count = %d\n", in intel_dp_dsc_compute_config()
2444 … pixel clock %d kHz DSC %s max lanes %d max rate %d max pipe_bpp %d max link_bpp " FXP_Q4_FMT "\n", in intel_dp_compute_config_link_bpp_limits()
2583 …"DP lane count %d clock %d bpp input %d compressed " FXP_Q4_FMT " link rate required %d available … in intel_dp_compute_link_config()
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| A D | intel_dp_mst.c | 521 …"[CRTC:%d:%s][CONNECTOR:%d:%s] Increasing link min bpp to " FXP_Q4_FMT " in DSC mode due to hblank… in adjust_limits_for_dsc_hblank_expansion_quirk()
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| A D | intel_display.c | 4685 "[CRTC:%d:%s] Link bpp limited to " FXP_Q4_FMT "\n", in intel_modeset_pipe_config()
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