Searched refs:G4X_WM_LEVEL_HPLL (Results 1 – 2 of 2) sorted by relevance
830 dev_priv->display.wm.pri_latency[G4X_WM_LEVEL_HPLL] = 35; in g4x_setup_wm_latency()832 dev_priv->display.wm.num_levels = G4X_WM_LEVEL_HPLL + 1; in g4x_setup_wm_latency()869 case G4X_WM_LEVEL_HPLL: in g4x_fbc_fifo_size()1039 crtc_state->wm.g4x.raw[G4X_WM_LEVEL_HPLL].fbc); in g4x_raw_plane_wm_compute()1084 if (level <= G4X_WM_LEVEL_HPLL) { in g4x_invalidate_wms()1102 if (level >= G4X_WM_LEVEL_HPLL && in g4x_compute_fbc_en()1103 wm_state->hpll.fbc > g4x_fbc_fifo_size(G4X_WM_LEVEL_HPLL)) in g4x_compute_fbc_en()1137 level = G4X_WM_LEVEL_HPLL; in _g4x_compute_pipe_wm()1256 g4x_plane_fifo_size(PLANE_PRIMARY, G4X_WM_LEVEL_HPLL) || in g4x_compute_intermediate_wm()3655 max_level = G4X_WM_LEVEL_HPLL; in g4x_wm_get_hw_state()[all …]
939 G4X_WM_LEVEL_HPLL, enumerator
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