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Searched refs:GCC_PCIE_1_PHY_BCR (Results 1 – 25 of 42) sorted by relevance

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/linux/include/dt-bindings/reset/
A Dqcom,gcc-apq8084.h93 #define GCC_PCIE_1_PHY_BCR 84 macro
/linux/include/dt-bindings/clock/
A Dqcom,sdx75-gcc.h173 #define GCC_PCIE_1_PHY_BCR 6 macro
A Dqcom,gcc-sc7280.h212 #define GCC_PCIE_1_PHY_BCR 3 macro
A Dqcom,gcc-sm8450.h211 #define GCC_PCIE_1_PHY_BCR 12 macro
A Dqcom,sm8550-gcc.h195 #define GCC_PCIE_1_PHY_BCR 11 macro
A Dqcom,gcc-sdm845.h230 #define GCC_PCIE_1_PHY_BCR 25 macro
A Dqcom,gcc-sm8150.h220 #define GCC_PCIE_1_PHY_BCR 7 macro
A Dqcom,sm8650-gcc.h218 #define GCC_PCIE_1_PHY_BCR 11 macro
A Dqcom,gcc-sm8250.h224 #define GCC_PCIE_1_PHY_BCR 12 macro
A Dqcom,gcc-sm8350.h226 #define GCC_PCIE_1_PHY_BCR 12 macro
A Dqcom,gcc-sc8180x.h260 #define GCC_PCIE_1_PHY_BCR 7 macro
A Dqcom,sa8775p-gcc.h277 #define GCC_PCIE_1_PHY_BCR 15 macro
A Dqcom,gcc-msm8996.h322 #define GCC_PCIE_1_PHY_BCR 82 macro
A Dqcom,x1e80100-gcc.h408 #define GCC_PCIE_1_PHY_BCR 11 macro
A Dqcom,gcc-sc8280xp.h411 #define GCC_PCIE_1_PHY_BCR 9 macro
/linux/Documentation/devicetree/bindings/phy/
A Dqcom,msm8996-qmp-pcie-phy.yaml168 resets = <&gcc GCC_PCIE_1_PHY_BCR>;
/linux/drivers/clk/qcom/
A Dgcc-sdx75.c2869 [GCC_PCIE_1_PHY_BCR] = { 0x56000 },
A Dgcc-sm8450.c3183 [GCC_PCIE_1_PHY_BCR] = { 0x9e01c },
A Dgcc-sm8550.c3257 [GCC_PCIE_1_PHY_BCR] = { 0x8e01c },
A Dgcc-apq8084.c3590 [GCC_PCIE_1_PHY_BCR] = { 0x1b80 },
A Dgcc-sm8250.c3548 [GCC_PCIE_1_PHY_BCR] = { 0x8e01c },
A Dgcc-msm8996.c3559 [GCC_PCIE_1_PHY_BCR] = { 0x6d038 },
A Dgcc-sc7280.c3399 [GCC_PCIE_1_PHY_BCR] = { 0x8e01c },
A Dgcc-sm8150.c3698 [GCC_PCIE_1_PHY_BCR] = { 0x8e01c },
A Dgcc-sm8650.c3715 [GCC_PCIE_1_PHY_BCR] = { 0x8e01c },

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