| /linux/drivers/edac/ |
| A D | skx_base.c | 174 return !!GET_BITFIELD(mcmtr, 2, 2); in skx_check_ecc()
225 #define SKX_SAD_ATTR(sad) GET_BITFIELD((sad), 3, 4)
300 idx = GET_BITFIELD(addr, 6, 8); in skx_sad_decode()
303 idx = GET_BITFIELD(addr, 8, 10); in skx_sad_decode()
306 idx = GET_BITFIELD(addr, 12, 14); in skx_sad_decode()
309 idx = GET_BITFIELD(addr, 30, 32); in skx_sad_decode()
313 tgt = GET_BITFIELD(ilv, 4 * idx, 4 * idx + 3); in skx_sad_decode()
385 #define SKX_TAD_SKT_GRAN(b) GET_BITFIELD((b), 4, 5)
459 #define SKX_RIR_VALID(b) GET_BITFIELD((b), 31, 31)
543 int ret = GET_BITFIELD(addr, b0, b0) | (GET_BITFIELD(addr, b1, b1) << 1); in skx_bank_bits()
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| A D | sb_edac.c | 53 #define GET_BITFIELD(v, lo, hi) \ macro
248 GET_BITFIELD(reg, 20, 23) : GET_BITFIELD(reg, 16, 19))
251 GET_BITFIELD(reg, 2, 15) : GET_BITFIELD(reg, 2, 14))
849 return GET_BITFIELD(reg, 1, 1); in interleave_mode()
854 return GET_BITFIELD(reg, 2, 3); in dram_attr()
864 return GET_BITFIELD(reg, 1, 2); in knl_interleave_mode()
881 return GET_BITFIELD(reg, 3, 4); in dram_attr_knl()
893 if (GET_BITFIELD(reg, 11, 11)) in get_memory_type()
916 if (GET_BITFIELD(reg, 16, 16)) in haswell_get_memory_type()
1971 int ret = GET_BITFIELD(addr, b0, b0) | (GET_BITFIELD(addr, b1, b1) << 1); in sb_bank_bits()
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| A D | skx_common.c | 210 *id = GET_BITFIELD(reg, 12, 14); in skx_get_src_id()
224 *id = GET_BITFIELD(reg, 0, 2); in skx_get_node_id()
231 switch (GET_BITFIELD(mtr, 8, 9)) { in get_width()
273 d->bus[0] = GET_BITFIELD(reg, 0, 7); in skx_get_all_bus_mappings()
274 d->bus[1] = GET_BITFIELD(reg, 8, 15); in skx_get_all_bus_mappings()
277 d->bus[2] = GET_BITFIELD(reg, 16, 23); in skx_get_all_bus_mappings()
278 d->bus[3] = GET_BITFIELD(reg, 24, 31); in skx_get_all_bus_mappings()
280 d->seg = GET_BITFIELD(reg, 16, 23); in skx_get_all_bus_mappings()
338 u32 val = GET_BITFIELD(reg, lobit, hibit); in skx_get_dimm_attr()
550 bool ripv = GET_BITFIELD(m->mcgstatus, 0, 0); in skx_mce_output_error()
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| A D | igen6_edac.c | 83 #define ECC_ERROR_LOG_ADDR(v) GET_BITFIELD(v, 5, 38)
84 #define ECC_ERROR_LOG_ADDR45(v) GET_BITFIELD(v, 5, 45)
85 #define ECC_ERROR_LOG_SYND(v) GET_BITFIELD(v, 46, 61)
108 #define MAD_DIMM_CH_DLW(v) GET_BITFIELD(v, 7, 8)
110 #define MAD_DIMM_CH_DSW(v) GET_BITFIELD(v, 24, 25)
114 #define MAC_MC_HASH_LSB(v) GET_BITFIELD(v, 1, 3)
122 #define CHANNEL_HASH_MODE(v) GET_BITFIELD(v, 28, 28)
376 return !GET_BITFIELD(val, 6, 6); in mtl_ps_ibecc_available()
421 GET_BITFIELD(eaddr, 0, intlv_bit - 1); in tgl_err_addr_to_mem_addr()
460 GET_BITFIELD(eaddr, 0, intlv_bit - 1); in adl_err_addr_to_imc_addr()
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| A D | i10nm_base.c | 60 GET_BITFIELD(reg, 0, 10) + 1) << 12)
62 ((GET_BITFIELD(reg, 0, 10) << 12) + 0x140000)
72 #define I10NM_SAD_ENABLE(reg) GET_BITFIELD(reg, 0, 0)
532 res->row = GET_BITFIELD(m->misc, 19, 39); in i10nm_mc_decode()
533 res->bank_group = GET_BITFIELD(m->misc, 40, 41); in i10nm_mc_decode()
534 res->bank_address = GET_BITFIELD(m->misc, 42, 43); in i10nm_mc_decode()
536 res->rank = GET_BITFIELD(m->misc, 56, 58); in i10nm_mc_decode()
545 res->row = GET_BITFIELD(m->misc, 19, 36); in i10nm_mc_decode()
546 res->bank_group = GET_BITFIELD(m->misc, 37, 38); in i10nm_mc_decode()
547 res->bank_address = GET_BITFIELD(m->misc, 39, 40); in i10nm_mc_decode()
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| A D | skx_common.h | 29 #define GET_BITFIELD(v, lo, hi) \ macro
52 #define IS_DIMM_PRESENT(r) GET_BITFIELD(r, 15, 15)
53 #define IS_NVDIMM_PRESENT(r, i) GET_BITFIELD(r, i, i)
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| A D | pnd2_edac.c | 126 #define GET_BITFIELD(v, lo, hi) (((v) & GENMASK_ULL(hi, lo)) >> (lo)) macro
1131 u32 core_err_cnt = GET_BITFIELD(m->status, 38, 52); in pnd2_mce_output_error()
1132 u32 mscod = GET_BITFIELD(m->status, 16, 31); in pnd2_mce_output_error()
1133 u32 errcode = GET_BITFIELD(m->status, 0, 15); in pnd2_mce_output_error()
1134 u32 optypenum = GET_BITFIELD(m->status, 4, 6); in pnd2_mce_output_error()
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