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Searched refs:INVALID_PIPE (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/i915/display/
A Dintel_pps.c35 case INVALID_PIPE: in pps_name()
187 if (intel_dp->pps.pps_pipe != INVALID_PIPE) in vlv_find_free_pps()
199 return INVALID_PIPE; in vlv_find_free_pps()
219 if (intel_dp->pps.pps_pipe != INVALID_PIPE) in vlv_power_sequencer_pipe()
314 return INVALID_PIPE; in vlv_initial_pps_pipe()
331 if (intel_dp->pps.pps_pipe == INVALID_PIPE) in vlv_initial_power_sequencer_setup()
335 if (intel_dp->pps.pps_pipe == INVALID_PIPE) in vlv_initial_power_sequencer_setup()
482 intel_dp->pps.pps_pipe = INVALID_PIPE; in intel_pps_reset_all()
551 intel_dp->pps.pps_pipe == INVALID_PIPE) in edp_have_panel_power()
1180 intel_dp->pps.pps_pipe = INVALID_PIPE; in vlv_detach_power_sequencer()
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A Dintel_link_bw.c74 enum pipe max_bpp_pipe = INVALID_PIPE; in intel_link_bw_reduce_bpp()
107 if (max_bpp_pipe == INVALID_PIPE) in intel_link_bw_reduce_bpp()
142 if (pipe == INVALID_PIPE) in intel_link_bw_set_bpp_limit_for_pipe()
A Dintel_display_limits.h15 INVALID_PIPE = -1, enumerator
A Dintel_cdclk.c1795 if (pipe == INVALID_PIPE) in bxt_cdclk_cd2x_pipe()
1800 if (pipe == INVALID_PIPE) in bxt_cdclk_cd2x_pipe()
1805 if (pipe == INVALID_PIPE) in bxt_cdclk_cd2x_pipe()
2065 if (pipe != INVALID_PIPE) in _bxt_set_cdclk()
2629 pipe = INVALID_PIPE; in intel_set_cdclk_pre_plane_update()
2636 pipe = INVALID_PIPE; in intel_set_cdclk_pre_plane_update()
2683 pipe = INVALID_PIPE; in intel_set_cdclk_post_plane_update()
3155 cdclk_state->pipe = INVALID_PIPE; in intel_cdclk_duplicate_state()
3268 enum pipe pipe = INVALID_PIPE; in intel_modeset_calc_cdclk()
3318 pipe = INVALID_PIPE; in intel_modeset_calc_cdclk()
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A Dintel_connector.c171 return INVALID_PIPE; in intel_connector_get_pipe()
A Dg4x_dp.c484 intel_dp->pps.active_pipe = INVALID_PIPE; in intel_dp_link_down()
1263 return INVALID_PIPE; in vlv_active_pipe()
A Dintel_crtc.c174 crtc_state->hsw_workaround_pipe = INVALID_PIPE; in intel_crtc_state_reset()
A Dintel_lvds.c996 intel_backlight_setup(connector, INVALID_PIPE); in intel_lvds_init()
A Dskl_watermark.c3615 return INVALID_PIPE; in intel_mbus_joined_pipe()
3631 pipe != INVALID_PIPE ? pipe_name(pipe) : '*'); in intel_dbuf_mbus_join_update()
3638 if (pipe != INVALID_PIPE) in intel_dbuf_mbus_join_update()
3689 if (pipe != INVALID_PIPE) { in intel_dbuf_mbus_post_ddb_update()
A Dintel_display.c1777 if (IS_HASWELL(dev_priv) && hsw_workaround_pipe != INVALID_PIPE) { in hsw_crtc_enable()
5692 enum pipe first_pipe = INVALID_PIPE, enabled_pipe = INVALID_PIPE; in hsw_mode_set_planes_workaround()
5720 crtc_state->hsw_workaround_pipe = INVALID_PIPE; in hsw_mode_set_planes_workaround()
5727 if (enabled_pipe != INVALID_PIPE) in hsw_mode_set_planes_workaround()
5733 if (enabled_pipe != INVALID_PIPE) in hsw_mode_set_planes_workaround()
6426 *failed_pipe = INVALID_PIPE; in intel_atomic_check_config()
A Dintel_display_irq.c966 enum pipe pipe = INVALID_PIPE; in gen11_dsi_te_interrupt_handler()
A Dintel_dp.c6621 enum pipe pipe = INVALID_PIPE; in intel_edp_backlight_setup()
6861 intel_dp->pps.pps_pipe = INVALID_PIPE; in intel_dp_init_connector()
6862 intel_dp->pps.active_pipe = INVALID_PIPE; in intel_dp_init_connector()
A Dvlv_dsi.c2026 intel_backlight_setup(connector, INVALID_PIPE); in vlv_dsi_init()
A Dicl_dsi.c2025 intel_backlight_setup(intel_connector, INVALID_PIPE); in icl_dsi_init()
/linux/drivers/gpu/drm/i915/gvt/
A Dreg.h81 (INVALID_PIPE)))); })

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