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/linux/Documentation/translations/zh_CN/core-api/irq/
A Dirq-domain.rst19 个中断控制器都能得到非重复的Linux IRQ号（数字）分配。
23 避免了重新实现与IRQ核心系统相同的回调机制。
25 在这里，中断号与硬件中断号离散了所有种类的对应关系：而在过去，IRQ号可以选择，
33 提供任何对控制器本地IRQ(hwirq)号到Linux IRQ号空间的反向映射的支持。
93 映射的优点是固定时间查找IRQ号，而且irq_descs只分配给在用的IRQ。 缺点是该表
131 会分配一个Linux IRQ号，并调用.map()回调，这样驱动就可以将Linux IRQ号编入硬件中。
149 不能动态分配Linux IRQ号，应该使用传统映射。
155 个固定的偏移来计算IRQ号，反之亦然。 缺点是需要中断控制器管理IRQ分配，并且需要为每
159 映射Linux IRQ 0-15，这样现有的ISA驱动程序就能得到正确的IRQ号。
171 将用于静态IRQ分配情况。
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A Dconcepts.rst12 什么是IRQ？
15 IRQ (Interrupt ReQuest) 指来自设备的中断请求。
17 多个设备可以连接到同一个引脚，从而共享一个IRQ。
19 IRQ编号是用来描述硬件中断源的内核标识符。通常它是一个到全局irq_desc数组的索引，
22 IRQ编号是对机器上可能的中断源的枚举。通常枚举的是系统中所有中断控制器的输入引脚
25 体系结构可以给IRQ号赋予额外的含义，在涉及到硬件手动配置的情况下，我们鼓励这样做。
26 ISA IRQ是赋予这种额外含义的一个典型例子。
A Dirq-affinity.rst12 SMP IRQ 亲和性
20 /proc/irq/IRQ#/smp_affinity和/proc/irq/IRQ#/smp_affinity_list指定了哪些CPU能
21 够关联到一个给定的IRQ源，这两个文件包含了这些指定cpu的cpu位掩码(smp_affinity)和cpu列
22 表(smp_affinity_list)。它不允许关闭所有CPU， 同时如果IRQ控制器不支持中断请求亲和
23 (IRQ affinity)，那么所有cpu的默认值将保持不变(即关联到所有CPU).
25 /proc/irq/default_smp_affinity指明了适用于所有非激活IRQ的默认亲和性掩码。一旦IRQ被
50 现在让我们把这个IRQ限制在CPU(4-7)。
/linux/Documentation/translations/zh_CN/core-api/
A Dgenericirq.rst18 Linux通用IRQ处理
64 这两个IRQ类型共享许多低级的细节，但有不同的流处理。
95 2. 高级别的IRQ流处理器
146 电平触发型IRQ流处理程序
211 电平触发型IRQ流处理器
223 默认的需回应IRQ流处理器
234 默认的边沿触发型IRQ流处理器
257 默认的简单型IRQ流处理器
287 EOI边沿型IRQ流处理器
293 坏的IRQ流处理器
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/linux/Documentation/translations/zh_CN/PCI/
A Dpci.rst64 - 禁用设备产生的IRQ
284 注册IRQ处理函数
289 所有IRQ线的中断处理程序都应该用 ``IRQF_SHARED`` 注册，并使用devid将IRQ映射
341 停止设备上的IRQ
346 当共享的IRQ处理程序被“解钩”时，使用同一IRQ线的其余设备仍然需要启用该IRQ。因此，
347 如果“脱钩”的设备断言IRQ线，假设它是其余设备中的一个断言IRQ线，系统将作出反应。
348 由于其他设备都不会处理这个IRQ，系统将“挂起”，直到它决定这个IRQ不会被处理并屏蔽
349 这个IRQ（100,000次之后）。一旦共享的IRQ被屏蔽，其余设备将停止正常工作。这不是
355 释放IRQ
358 的IRQ被处理后返回控制，从该IRQ上“解钩”驱动程序的IRQ处理程序，最后如果没有人
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/linux/Documentation/arch/arm/
A Dinterrupts.rst16 Secondly, the IRQ subsystem.
57 * Acknowledge the IRQ.
58 * If this is a level-based IRQ, then it is expected to mask the IRQ
63 * Mask the IRQ in hardware.
67 * Unmask the IRQ in hardware.
71 * Re-run the IRQ
75 * Set the type of the IRQ.
95 set the IRQ type.
104 - per-IRQ handler
113 further IRQ events should the IRQ happen again while processing. The
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/linux/Documentation/translations/zh_TW/
A DIRQ.txt26 何爲 IRQ?
28 一個 IRQ 是來自某個設備的一個中斷請求。目前，它們可以來自一個硬體引腳，
29 或來自一個數據包。多個設備可能連接到同個硬體引腳，從而共享一個 IRQ。
31 一個 IRQ 編號是用於告知硬體中斷源的內核標識。通常情況下，這是一個
35 一個 IRQ 編號是設備上某個可能的中斷源的枚舉。通常情況下，枚舉的編號是
39 架構可以對 IRQ 編號指定額外的含義，在硬體涉及任何手工配置的情況下，
40 是被提倡的。ISA 的 IRQ 是一個分配這類額外含義的典型例子。
/linux/Documentation/core-api/irq/
A Dirq-domain.rst6 space where each separate IRQ source is assigned a different number.
10 IRQ numbers.
15 mechanisms as the IRQ core system by modelling their interrupt
20 be chosen so they matched the hardware IRQ line into the root
29 the controller-local IRQ (hwirq) number into the Linux IRQ number
39 be easily extended to support other IRQ topology data sources.
100 the hwirq, and the IRQ number is stored in the table.
151 Linux IRQ number into the hardware.
201 is supporting both dynamic and static IRQ assignments.
207 for the static IRQ assignment case.
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A Dconcepts.rst2 What is an IRQ?
5 An IRQ is an interrupt request from a device.
8 sharing an IRQ.
10 An IRQ number is a kernel identifier used to talk about a hardware
15 An IRQ number is an enumeration of the possible interrupt sources on a
21 Architectures can assign additional meaning to the IRQ numbers, and
A Dirq-affinity.rst2 SMP IRQ affinity
10 /proc/irq/IRQ#/smp_affinity and /proc/irq/IRQ#/smp_affinity_list specify
11 which target CPUs are permitted for a given IRQ source. It's a bitmask
13 allowed to turn off all CPUs, and if an IRQ controller does not support
14 IRQ affinity then the value will not change from the default of all cpus.
17 to all non-active IRQs. Once IRQ is allocated/activated its affinity bitmask
43 Now lets restrict that IRQ to CPU(4-7).
/linux/Documentation/misc-devices/
A Dpci-endpoint-test.rst16 #) raise legacy IRQ
17 #) raise MSI IRQ
18 #) raise MSI-X IRQ
34 Tests legacy IRQ
42 Changes driver IRQ type configuration. The IRQ type
45 Gets driver IRQ type configuration.
/linux/Documentation/devicetree/bindings/interrupt-controller/
A Darm,versatile-fpga-irq.txt3 One or more FPGA IRQ controllers can be synthesized in an ARM reference board
5 controllers are OR:ed together and fed to the CPU tile's IRQ input. Each
12 as the FPGA IRQ controller has no configuration options for interrupt
36 - interrupts: if the FPGA IRQ controller is cascaded, i.e. if its IRQ
37 output is simply connected to the input of another IRQ controller,
38 then the parent IRQ shall be specified in this property.
A Dcdns,xtensa-pic.txt8 When it's 1, the first cell is the internal IRQ number.
9 When it's 2, the first cell is the IRQ number, and the second cell
11 Periferals are usually connected to a fixed external IRQ, but for different
12 core variants it may be mapped to different internal IRQ.
13 IRQ sensitivity and priority are fixed for each core variant and may not be
A Dst,stih407-irq-syscfg.yaml22 description: Phandle to Cortex-A9 IRQ system config registers
29 - description: Enable the IRQ of the channel one.
30 - description: Enable the IRQ of the channel two.
36 - description: Enable the IRQ of the channel one.
37 - description: Enable the IRQ of the channel two.
/linux/Documentation/driver-api/hte/
A Dtegra-hte.rst10 (Legacy Interrupt Controller) IRQ GTE. Both GTE instances get the timestamp
34 LIC (Legacy Interrupt Controller) IRQ GTE
37 This GTE instance timestamps LIC IRQ lines in real time. The hte devicetree
39 provides an example of how a consumer can request an IRQ line. Since it is a
40 one-to-one mapping with IRQ GTE provider, consumers can simply specify the IRQ
44 The provider source code of both IRQ and GPIO GTE instances is located at
46 ``drivers/hte/hte-tegra194-test.c`` demonstrates HTE API usage for both IRQ
/linux/Documentation/translations/zh_CN/arch/loongarch/
A Dirq-chip-model.rst9 LoongArch的IRQ芯片模型（层级关系）
13 中的中断控制器（即IRQ芯片）包括CPUINTC（CPU Core Interrupt Controller）、LIOINTC（
20 断控制器（在配套芯片组里面）。这些中断控制器（或者说IRQ芯片）以一种层次树的组织形式
21 级联在一起，一共有两种层级关系模型（传统IRQ模型和扩展IRQ模型）。
23 传统IRQ模型
59 扩展IRQ模型
90 高级扩展IRQ模型
/linux/Documentation/translations/zh_TW/arch/loongarch/
A Dirq-chip-model.rst9 LoongArch的IRQ芯片模型（層級關係）
13 中的中斷控制器（即IRQ芯片）包括CPUINTC（CPU Core Interrupt Controller）、LIOINTC（
20 斷控制器（在配套芯片組裏面）。這些中斷控制器（或者說IRQ芯片）以一種層次樹的組織形式
21 級聯在一起，一共有兩種層級關係模型（傳統IRQ模型和擴展IRQ模型）。
23 傳統IRQ模型
59 擴展IRQ模型
/linux/Documentation/devicetree/bindings/rtc/
A Disil,isl12057.txt10 and 2120 ARM-based NAS); On those devices, the IRQ#2 pin of the chip
15 be set when the IRQ#2 pin of the chip is not connected to the SoC but
26 the availability of an IRQ line connected to the SoC.
29 Example isl12057 node without IRQ#2 pin connected (no alarm support):
37 Example isl12057 node with IRQ#2 pin connected to main SoC via MPP6 (note
40 SoC, and the main function of the MPP used as IRQ line, i.e.
67 Example isl12057 node without IRQ#2 pin connected to the SoC but to a
/linux/Documentation/core-api/
A Dgenericirq.rst4 Linux generic IRQ handling
23 generic IRQ handling layer.
72 transparent IRQ subsystem design.
104 2. High-level IRQ flow handlers
154 High-level IRQ flow handlers
222 Default Level IRQ flow handler
235 Default Fast EOI IRQ flow handler
247 Default Edge IRQ flow handler
271 Default simple IRQ flow handler
304 EOI Edge IRQ flow handler
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/linux/drivers/pinctrl/renesas/
A Dpfc-r8a73a4.c238 #define IRQ(a) IRQ##a##_MARK macro
287 IRQ(40), enumerator
299 F1(TXP2), F1(COEX_0), F1(COEX_1), IRQ(19), IRQ(18), /* Port85 */ enumerator
303 F1(KEYIN5), F1(KEYIN6), IRQ(41), F1(KEYIN7), IRQ(42), enumerator
305 F2(KEYOUT4), F2(KEYOUT5), IRQ(43), F2(KEYOUT6), IRQ(44), /* Port110 */ enumerator
326 IRQ(20), /* Port160 */ enumerator
327 IRQ(21), IRQ(22), IRQ(23), enumerator
331 IRQ(24), IRQ(25), IRQ(26), IRQ(27), enumerator
410 IRQ(17), IRQ(28), IRQ(29), IRQ(30), IRQ(53), IRQ(54), enumerator
411 IRQ(55), IRQ(56), IRQ(57), enumerator
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/linux/Documentation/power/
A Dsuspend-and-interrupts.rst43 The IRQF_NO_SUSPEND flag is used to indicate that to the IRQ subsystem when
45 leave the corresponding IRQ enabled so as to allow the interrupt to work as
50 Note that the IRQF_NO_SUSPEND flag affects the entire IRQ and not just one
51 user of it. Thus, if the IRQ is shared, all of the interrupt handlers installed
54 the IRQ's users. For this reason, using IRQF_NO_SUSPEND and IRQF_SHARED at the
80 Calling enable_irq_wake() causes suspend_device_irqs() to treat the given IRQ
81 in a special way. Namely, the IRQ remains enabled, but on the first interrupt
105 IRQ subsystem to trigger a system wakeup.
127 to individual interrupt handlers, so sharing an IRQ between a system wakeup
131 In rare cases an IRQ can be shared between a wakeup device driver and an
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/linux/Documentation/tools/rtla/
A Drtla-timerlat-hist.rst47 …Index IRQ-000 Thr-000 IRQ-001 Thr-001 IRQ-002 Thr-002 IRQ-003 Thr-003 IRQ-004 …
/linux/Documentation/virt/kvm/devices/
A Dmpic.rst34 IRQ input line for each standard openpic source. 0 is inactive and 1
41 "attr" is the IRQ number. IRQ numbers for standard sources are the
44 IRQ Routing:
46 The MPIC emulation supports IRQ routing. Only a single MPIC device can
58 Access to non-SRC interrupts is not implemented through IRQ routing mechanisms.
/linux/Documentation/devicetree/bindings/net/can/
A Dbosch,c_can.yaml84 - description: Error and status IRQ
85 - description: Message object IRQ
86 - description: RAM ECC correctable error IRQ
87 - description: RAM ECC non-correctable error IRQ
93 - description: Error and status IRQ
/linux/arch/arc/kernel/
A Dentry-compact.S118 ;##################### Scratch Mem for IRQ stack switching #############
152 ; if L2 IRQ interrupted a L1 ISR, disable preemption
155 ; -L1 IRQ taken
157 ; -preemption off IRQ, user task in syscall picked to run
170 bbit0 r9, STATUS_A1_BIT, 1f ; L1 not active when L2 IRQ, so normal
306 ; Restore the saved sys context (common exit-path for EXCPN/IRQ/Trap)
307 ; IRQ shd definitely not happen between now and rtie
320 ; use the same priority as rtie: EXCPN, L2 IRQ, L1 IRQ, None
343 ; if L2 IRQ interrupted an L1 ISR, we'd disabled preemption earlier
350 bbit0 r9, STATUS_A1_BIT, 149f ; L1 not active when L2 IRQ, so normal

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