Searched refs:IS_ALDERLAKE_S (Results 1 – 25 of 25) sorted by relevance
140 drm_WARN_ON(&dev_priv->drm, !IS_ALDERLAKE_S(dev_priv) && in intel_pch_type()171 if (IS_ALDERLAKE_S(dev_priv) || IS_ALDERLAKE_P(dev_priv)) in intel_virt_detect_pch()
138 if (IS_ALDERLAKE_S(i915)) in has_phy_misc()209 else if (IS_ALDERLAKE_S(dev_priv)) in phy_is_master()
124 #define HAS_D12_PLANE_MINIMIZATION(i915) (IS_ROCKETLAKE(i915) || IS_ALDERLAKE_S(i915))
185 } else if (IS_ALDERLAKE_S(i915)) { in dmc_firmware_default()544 if ((IS_TIGERLAKE(i915) || IS_ALDERLAKE_S(i915)) && in disable_dmc_evt()
2603 IS_TIGERLAKE(i915) || IS_ALDERLAKE_S(i915) || IS_ALDERLAKE_P(i915)) && in ehl_combo_pll_div_frac_wa_needed()3351 if (IS_ALDERLAKE_S(i915)) { in icl_get_combo_phy_dpll()3694 if (IS_ALDERLAKE_S(i915)) { in icl_pll_get_hw_state()3758 if (IS_ALDERLAKE_S(i915)) { in icl_dpll_write()4315 else if (IS_ALDERLAKE_S(i915)) in intel_shared_dpll_init()
353 if (IS_ALDERLAKE_S(dev_priv) || IS_ALDERLAKE_P(dev_priv)) { in gen11_dsi_program_esc_clk_div()374 if (IS_ALDERLAKE_S(dev_priv) || IS_ALDERLAKE_P(dev_priv)) { in gen11_dsi_program_esc_clk_div()
2248 } else if (IS_ALDERLAKE_S(i915)) { in map_ddc_pin()2393 else if (IS_ALDERLAKE_S(i915)) in dvo_port_to_port()3681 } else if (IS_ALDERLAKE_S(i915)) { in map_aux_ch()
1717 } else if (IS_ALDERLAKE_S(i915)) { in intel_ddi_buf_trans_init()
1792 if (DISPLAY_VER(display) >= 13 || IS_ALDERLAKE_S(dev_priv)) in intel_hdmi_source_max_tmds_clock()2887 if (IS_ALDERLAKE_S(dev_priv)) in intel_hdmi_default_ddc_pin()
754 else if (IS_ALDERLAKE_S(dev_priv)) in intel_bw_init_hw()
1706 else if (IS_ALDERLAKE_S(i915)) in intel_display_power_map_init()
1549 if (IS_ALDERLAKE_S(i915) && IS_DISPLAY_STEP(i915, STEP_A0, STEP_A2)) in __intel_display_device_info_runtime_init()
1591 if (IS_ALDERLAKE_S(dev_priv) || in tgl_bw_buddy_init()
1651 if ((IS_ALDERLAKE_S(dev_priv) || IS_TIGERLAKE(dev_priv)) && in skl_plane_check_fb()
1417 if (IS_ROCKETLAKE(dev_priv) || IS_ALDERLAKE_S(dev_priv) || in intel_psr2_config_valid()
1902 else if (IS_ALDERLAKE_S(dev_priv)) in intel_phy_is_combo()1956 else if (IS_ALDERLAKE_S(i915) && port >= PORT_TC1) in intel_port_to_phy()
5020 } else if (IS_ALDERLAKE_S(dev_priv)) { in intel_ddi_init()
581 else if (IS_ALDERLAKE_P(dev_priv) || IS_ALDERLAKE_S(dev_priv) || in intel_dp_set_source_rates()
90 IS_ALDERLAKE_S(i915) || in mmio_invalidate_full()
2245 if (IS_DG2(i915) || IS_ALDERLAKE_P(i915) || IS_ALDERLAKE_S(i915) || in rcs_engine_wa_init()2258 if (IS_ALDERLAKE_P(i915) || IS_ALDERLAKE_S(i915) || IS_DG1(i915) || in rcs_engine_wa_init()2278 if (IS_ALDERLAKE_P(i915) || IS_ALDERLAKE_S(i915) || in rcs_engine_wa_init()
62 #define IS_ALDERLAKE_S(dev_priv) IS_PLATFORM(dev_priv, XE_ALDERLAKE_S) macro
187 } else if (IS_ALDERLAKE_S(i915)) { in intel_step_init()
529 #define IS_ALDERLAKE_S(i915) IS_PLATFORM(i915, INTEL_ALDERLAKE_S) macro
46 if (IS_ALDERLAKE_S(i915) && !IS_RAPTORLAKE_S(i915)) { in uc_expand_default_options()
500 !IS_ROCKETLAKE(i915) && !IS_ALDERLAKE_S(i915)) { in set_proto_ctx_engines_bond()
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