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Searched refs:IS_DG1 (Results 1 – 25 of 25) sorted by relevance

/linux/drivers/gpu/drm/i915/display/
A Dintel_combo_phy.c142 IS_DG1(i915)) in has_phy_misc()
211 else if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) in phy_is_master()
381 if (IS_TIGERLAKE(dev_priv) || IS_DG1(dev_priv)) { in icl_combo_phys_uninit()
A Dintel_dpll_mgr.c204 if (IS_DG1(i915)) in intel_combo_pll_enable_reg()
3357 } else if (IS_DG1(i915)) { in icl_get_combo_phy_dpll()
3697 } else if (IS_DG1(i915)) { in icl_pll_get_hw_state()
3761 } else if (IS_DG1(i915)) { in icl_dpll_write()
4317 else if (IS_DG1(i915)) in intel_shared_dpll_init()
A Dintel_display_power.c932 else if (IS_DG1(dev_priv)) in get_allowed_dc_mask()
1588 if (IS_DGFX(dev_priv) && !IS_DG1(dev_priv)) in tgl_bw_buddy_init()
A Dintel_dmc.c188 } else if (IS_DG1(i915)) { in dmc_firmware_default()
A Dintel_ddi_buf_trans.c1721 } else if (IS_DG1(i915)) { in intel_ddi_buf_trans_init()
A Dintel_bw.c209 else if (IS_DG1(dev_priv)) in intel_read_qgv_point_info()
A Dintel_display_power_map.c1704 else if (IS_DG1(i915)) in intel_display_power_map_init()
A Dintel_bios.c2398 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) in dvo_port_to_port()
3684 } else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) { in map_aux_ch()
A Dintel_ddi.c5030 } else if (IS_DG1(dev_priv)) { in intel_ddi_init()
5100 else if (IS_DG1(dev_priv)) in intel_ddi_init()
A Dskl_universal_plane.c2432 if (IS_DG1(i915) || IS_ROCKETLAKE(i915) || in gen12_plane_has_mc_ccs()
A Dintel_display.c1904 else if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) in intel_phy_is_combo()
1958 else if ((IS_DG1(i915) || IS_ROCKETLAKE(i915)) && port >= PORT_TC1) in intel_port_to_phy()
A Dintel_dp.c582 IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) in intel_dp_set_source_rates()
/linux/drivers/gpu/drm/i915/gt/
A Dintel_tlb.c88 IS_DG1(i915) || in mmio_invalidate_full()
A Dintel_region_lmem.c172 if (!IS_DG1(uncore->i915)) in get_legacy_lowmem_region()
A Dintel_gsc.c176 if (IS_DG1(i915)) { in gsc_init_one()
A Dintel_workarounds.c737 if (!IS_DG1(i915)) { in gen12_ctx_workarounds_init()
920 else if (IS_DG1(i915)) in __intel_engine_init_ctx_wa()
1664 else if (IS_DG1(i915)) in gt_init_workarounds()
2246 IS_DG1(i915) || IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915)) { in rcs_engine_wa_init()
2258 if (IS_ALDERLAKE_P(i915) || IS_ALDERLAKE_S(i915) || IS_DG1(i915) || in rcs_engine_wa_init()
A Dintel_mocs.c473 } else if (IS_DG1(i915)) { in get_mocs_settings()
/linux/drivers/gpu/drm/xe/compat-i915-headers/
A Di915_drv.h61 #define IS_DG1(dev_priv) IS_PLATFORM(dev_priv, XE_DG1) macro
/linux/drivers/gpu/drm/i915/
A Di915_hwmon.c300 if (IS_DG1(i915) || IS_DG2(i915)) in hwm_pcode_read_i1()
320 return IS_DG1(i915) || IS_DG2(i915) ? 0444 : 0; in hwm_in_is_visible()
812 if (IS_DG1(i915) || IS_DG2(i915)) { in hwm_get_preregistration_info()
A Dintel_step.c190 } else if (IS_DG1(i915)) { in intel_step_init()
A Di915_drv.h528 #define IS_DG1(i915) IS_PLATFORM(i915, INTEL_DG1) macro
A Di915_driver.c185 pre |= IS_DG1(dev_priv) && INTEL_REVID(dev_priv) < 0x1; in intel_detect_preproduction_hw()
/linux/drivers/gpu/drm/i915/soc/
A Dintel_pch.c231 } else if (IS_DG1(dev_priv)) { in intel_detect_pch()
/linux/drivers/gpu/drm/i915/gem/
A Di915_gem_dmabuf.c261 (!HAS_LLC(i915) && !IS_DG1(i915))) in i915_gem_object_get_pages_dmabuf()
A Di915_gem_stolen.c908 if (HAS_LMEMBAR_SMEM_STOLEN(i915) || IS_DG1(i915)) { in i915_gem_stolen_lmem_setup()

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