Searched refs:IS_DISPLAY_VER (Results 1 – 17 of 17) sorted by relevance
| /linux/drivers/gpu/drm/i915/display/ |
| A D | intel_display_device.h | 123 #define HAS_CUR_FBC(i915) (!HAS_GMCH(i915) && IS_DISPLAY_VER(i915, 7, 13))
145 #define HAS_LSPCON(i915) (IS_DISPLAY_VER(i915, 9, 10))
194 #define IS_DISPLAY_VER(i915, from, until) \ macro
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| A D | intel_display_debugfs.c | 729 if (DISPLAY_VER(i915) >= 13 || IS_DISPLAY_VER(i915, 9, 10)) { in i915_lpsp_status()
731 } else if (IS_DISPLAY_VER(i915, 11, 12)) { in i915_lpsp_status()
1132 else if (IS_DISPLAY_VER(i915, 9, 10)) in i915_lpsp_capability_show()
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| A D | intel_vrr.c | 280 if (IS_DISPLAY_VER(display, 12, 13)) in intel_vrr_set_transcoder_timings()
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| A D | intel_fbc.c | 906 if (IS_DISPLAY_VER(display, 11, 12)) in intel_fbc_program_workarounds()
1341 if (IS_DISPLAY_VER(display, 12, 14) && crtc_state->has_sel_update && in intel_fbc_check_plane()
1348 if ((IS_DISPLAY_VER(display, 12, 13) || in intel_fbc_check_plane()
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| A D | intel_display_device.c | 1597 if (IS_DISPLAY_VER(i915, 7, 8) && HAS_PCH_SPLIT(i915)) { in __intel_display_device_info_runtime_init()
1660 if (IS_DISPLAY_VER(i915, 10, 12) && in __intel_display_device_info_runtime_init()
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| A D | intel_pps.c | 983 if (IS_DISPLAY_VER(display, 13, 14)) in intel_pps_on_unlocked()
997 if (IS_DISPLAY_VER(display, 13, 14)) in intel_pps_on_unlocked()
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| A D | intel_crt.c | 370 else if (IS_DISPLAY_VER(dev_priv, 3, 4)) in intel_crt_mode_valid()
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| A D | intel_modeset_setup.c | 935 if (IS_DISPLAY_VER(i915, 10, 12)) in intel_early_display_was()
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| A D | intel_bw.c | 1463 if (intel_has_sagv(i915) && IS_DISPLAY_VER(i915, 11, 13)) in intel_bw_init()
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| A D | intel_psr.c | 1789 if (IS_DISPLAY_VER(display, 11, 14)) in wm_optimization_wa()
1858 if (IS_DISPLAY_VER(display, 9, 10)) in intel_psr_enable_source()
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| A D | intel_display_irq.c | 1800 if (IS_DISPLAY_VER(dev_priv, 11, 13)) { in gen8_de_irq_postinstall()
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| A D | intel_fb.c | 465 if (!IS_DISPLAY_VER(i915, md->display_ver.from, md->display_ver.until)) in plane_has_modifier()
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| A D | intel_ddi.c | 576 if (IS_DISPLAY_VER(dev_priv, 8, 10) && in intel_ddi_transcoder_func_reg_val_get()
656 if (IS_DISPLAY_VER(dev_priv, 8, 10)) in intel_ddi_disable_transcoder_func()
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| A D | skl_universal_plane.c | 2538 plane->need_async_flip_toggle_wa = IS_DISPLAY_VER(dev_priv, 9, 10); in skl_universal_plane_create()
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| A D | intel_display.c | 1908 else if (IS_ALDERLAKE_P(dev_priv) || IS_DISPLAY_VER(dev_priv, 11, 12)) in intel_phy_is_combo()
2651 return IS_DISPLAY_VER(dev_priv, 5, 7) || IS_CHERRYVIEW(dev_priv); in intel_cpu_transcoder_has_m2_n2()
7896 } else if (IS_DISPLAY_VER(dev_priv, 3, 4)) { in intel_setup_outputs()
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| A D | intel_hdmi.c | 530 if (!(IS_DISPLAY_VER(display, 13, 14) && crtc_state->has_psr && in hsw_write_infoframe()
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| A D | intel_bios.c | 1227 if (!IS_DISPLAY_VER(display, 3, 7)) { in parse_sdvo_device_mapping()
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