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Searched refs:IS_HASWELL (Results 1 – 25 of 46) sorted by relevance

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/linux/drivers/gpu/drm/i915/soc/
A Dintel_pch.c33 !IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)); in intel_pch_type()
40 !IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)); in intel_pch_type()
47 !IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)); in intel_pch_type()
55 !IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)); in intel_pch_type()
186 else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in intel_virt_detect_pch()
A Dintel_dram.c754 if (!(IS_HASWELL(i915) || IS_BROADWELL(i915) || GRAPHICS_VER(i915) >= 9)) in intel_dram_edram_detect()
/linux/drivers/gpu/drm/i915/display/
A Dhsw_ips.c113 if (IS_HASWELL(i915) && in hsw_ips_need_disable()
154 if (IS_HASWELL(i915) && in hsw_ips_need_enable()
266 if (IS_HASWELL(i915)) { in hsw_ips_get_config()
A Di9xx_plane.c117 if (IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) in i9xx_plane_has_fbc()
293 if (!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)) { in i9xx_check_plane_surface()
306 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in i9xx_check_plane_surface()
485 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in i9xx_plane_update_arm()
911 else if (IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) in intel_primary_plane_create()
926 if (IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) in intel_primary_plane_create()
1105 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in i9xx_get_initial_plane_config()
A Dintel_display_power.c1203 if (IS_HASWELL(dev_priv)) in assert_can_disable_lcpll()
1229 if (IS_HASWELL(dev_priv)) in hsw_read_dcomp()
1237 if (IS_HASWELL(dev_priv)) { in hsw_write_dcomp()
1929 } else if (IS_BROADWELL(i915) || IS_HASWELL(i915)) { in intel_power_domains_init_hw()
2231 } else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) { in intel_display_power_suspend_late()
2246 } else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) { in intel_display_power_resume_early()
2263 } else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) { in intel_display_power_suspend()
2287 } else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) { in intel_display_power_resume()
A Dintel_display.c847 if (IS_IVYBRIDGE(dev_priv) || IS_HASWELL(dev_priv)) in ilk_pfit_enable()
2648 if (IS_HASWELL(dev_priv)) in intel_cpu_transcoder_has_m2_n2()
2827 IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) in intel_pipe_is_interlaced()
3233 if (IS_HASWELL(dev_priv) && crtc_state->dither) in hsw_set_transconf()
3241 if (IS_HASWELL(dev_priv) && in hsw_set_transconf()
3402 if (IS_IVYBRIDGE(dev_priv) || IS_HASWELL(dev_priv)) in ilk_get_pfit_config()
3867 if (IS_HASWELL(dev_priv)) { in hsw_get_pipe_config()
3886 if (IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) in hsw_get_pipe_config()
4327 IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) { in intel_crtc_atomic_check()
5764 if (IS_HASWELL(dev_priv)) in intel_modeset_checks()
[all …]
A Dintel_sprite.c666 (IS_IVYBRIDGE(dev_priv) || IS_HASWELL(dev_priv)); in ivb_need_sprite_gamma()
855 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in ivb_sprite_update_arm()
1629 if (IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) { in intel_sprite_plane_create()
A Dintel_pipe_crc.c309 if (IS_HASWELL(dev_priv) && in intel_crtc_crc_setup_workarounds()
A Dintel_display_debugfs.c733 } else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) { in i915_lpsp_status()
1137 else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) in i915_lpsp_capability_show()
A Dintel_dp_aux.c804 else if (IS_BROADWELL(i915) || IS_HASWELL(i915)) in intel_dp_aux_init()
A Dintel_fbc.c1158 } else if (DISPLAY_VER(display) >= 8 || IS_HASWELL(i915)) { in intel_fbc_max_plane_size()
1412 if (IS_HASWELL(i915) || IS_BROADWELL(i915)) { in intel_fbc_check_plane()
A Dintel_modeset_setup.c942 if (IS_HASWELL(i915)) in intel_early_display_was()
/linux/drivers/gpu/drm/i915/
A Di915_drv.h515 #define IS_HASWELL(i915) IS_PLATFORM(i915, INTEL_HASWELL) macro
563 #define IS_HASWELL_EARLY_SDV(i915) (IS_HASWELL(i915) && \
573 #define IS_HASWELL_GT3(i915) (IS_HASWELL(i915) && \
575 #define IS_HASWELL_GT1(i915) (IS_HASWELL(i915) && \
A Di915_cmd_parser.c967 if (IS_HASWELL(engine->i915)) { in intel_engine_init_cmd_parser()
976 if (IS_HASWELL(engine->i915)) { in intel_engine_init_cmd_parser()
1000 } else if (IS_HASWELL(engine->i915)) { in intel_engine_init_cmd_parser()
1012 } else if (IS_HASWELL(engine->i915)) { in intel_engine_init_cmd_parser()
1559 if (IS_HASWELL(engine->i915)) in intel_engine_cmd_parser()
A Dintel_device_info.c244 if (IS_HASWELL(i915) || IS_BROADWELL(i915)) { in intel_device_info_subplatform_init()
A Dintel_clock_gating.c764 else if (IS_HASWELL(i915)) in intel_clock_gating_hooks_init()
/linux/drivers/gpu/drm/i915/gt/
A Dintel_llc.c91 } else if (IS_HASWELL(i915)) { in calc_ia_freq()
A Dgen7_renderclear.c58 if (IS_HASWELL(i915)) { in batch_get_defaults()
391 IS_HASWELL(i915) ? in emit_batch()
A Dintel_rps.c806 else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) in gen6_rps_set()
1185 if (IS_HASWELL(i915) || IS_BROADWELL(i915) || in gen6_rps_init()
2009 if (GRAPHICS_VER(i915) == 6 || IS_IVYBRIDGE(i915) || IS_HASWELL(i915)) { in intel_rps_init()
2086 else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) in intel_rps_get_cagf()
2279 if (IS_HASWELL(i915) || IS_BROADWELL(i915)) in rps_frequency_dump()
A Dgen6_ppgtt.c39 if (IS_HASWELL(i915)) { in gen7_ppgtt_enable()
A Dintel_ring_submission.c698 IS_HASWELL(i915) ? engine->gt->info.num_engines - 1 : 0; in mi_set_context()
1190 if (IS_HASWELL(i915)) in setup_rcs()
A Dintel_gt.c185 if (IS_HASWELL(i915)) in intel_gt_init_hw()
A Dintel_sseu.c652 else if (IS_HASWELL(i915)) in intel_sseu_info_init()
/linux/drivers/gpu/drm/xe/compat-i915-headers/
A Di915_drv.h48 #define IS_HASWELL(dev_priv) (dev_priv && 0) macro
/linux/drivers/gpu/drm/i915/selftests/
A Digt_spinner.c187 else if (IS_HASWELL(rq->i915)) in igt_spinner_create_request()

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