| /linux/Documentation/trace/coresight/ |
| A D | coresight.rst | 403 Instruction 0 0x8026B544 E3A03000 false MOV r3,#0
406 Instruction 0 0x8026B550 E3530004 false CMP r3,#4
407 Instruction 0 0x8026B554 E2833001 false ADD r3,r3,#1
412 Instruction 0 0x8026B550 E3530004 false CMP r3,#4
413 Instruction 0 0x8026B554 E2833001 false ADD r3,r3,#1
417 Instruction 0 0x8026B550 E3530004 false CMP r3,#4
418 Instruction 0 0x8026B554 E2833001 false ADD r3,r3,#1
422 Instruction 0 0x8026B550 E3530004 false CMP r3,#4
427 Instruction 0 0x8026B550 E3530004 false CMP r3,#4
432 Instruction 0 0x8026B550 E3530004 false CMP r3,#4
[all …]
|
| /linux/Documentation/arch/powerpc/ |
| A D | isa-versions.rst | 24 Power5 - PowerPC User Instruction Set Architecture Book I v2.02
27 PPC970 - PowerPC User Instruction Set Architecture Book I v2.01
31 Power4+ - PowerPC User Instruction Set Architecture Book I v2.01
34 Power4 - PowerPC User Instruction Set Architecture Book I v2.00
|
| /linux/Documentation/virt/kvm/s390/ |
| A D | s390-pv.rst | 63 Instruction emulation
71 Instruction Data Area (SIDA), the Interception Parameters (IP) and the
74 Instruction data is copied to and from the SIDA when needed. Guest
88 The Secure Instruction Data Area contains instruction storage
89 data. Instruction data, i.e. data being referenced by an instruction
97 Instruction emulation interceptions
|
| /linux/Documentation/arch/loongarch/ |
| A D | introduction.rst | 109 0x8 Bad (Faulting) Instruction Word BADI
180 0x380 Instruction Fetch WatchPoint FWPC
182 0x381 Instruction Fetch WatchPoint FWPS
184 0x390+8n (0≤n≤7) Instruction Fetch WatchPoint n FWPnCFG1
186 0x391+8n (0≤n≤7) Instruction Fetch WatchPoint n FWPnCFG2
188 0x392+8n (0≤n≤7) Instruction Fetch WatchPoint n FWPnCFG3
190 0x393+8n (0≤n≤7) Instruction Fetch WatchPoint n FWPnCFG4
200 Basic Instruction Set
203 Instruction formats
|
| /linux/arch/m68k/ifpsp060/ |
| A D | iskeleton.S | 59 | Instruction exception handler. For a normal exit, the
62 | Unimplemented Integer Instruction stack frame with
85 | Instruction exception handler. If the instruction was a "chk2"
120 | Instruction exception handler isp_unimp(). If the instruction is a 64-bit
123 | Integer Instruction stack frame and branches to this routine.
|
| A D | isp.doc | 35 Integer Instruction" exception vector #61.
108 For example, if the 68060 hardware took a "Unimplemented Integer Instruction"
175 address) take the Unimplemented Integer Instruction exception. When the
|
| /linux/Documentation/devicetree/bindings/perf/ |
| A D | riscv,pmu.yaml | 131 /* SBI_PMU_HW_CACHE_REFERENCES -> Instruction or Data cache/ITIM busy */
133 /* SBI_PMU_HW_CACHE_MISSES -> Instruction or Data cache miss or MMIO access */
143 /* L1I_READ_ACCESS -> Instruction cache miss */
149 /* ITLB_READ_MISS-> Instruction TLB miss */
|
| /linux/arch/arc/kernel/ |
| A D | entry-arcv2.S | 34 VECTOR EV_TLBMissI ; Instruction TLB miss
40 VECTOR EV_Extension ; Extn Instruction Exception
121 ; Instruction fetch or Data access, under a single Exception Vector
|
| A D | entry-compact.S | 105 VECTOR EV_TLBMissI ; 0x108, Instruction TLB miss (0x21)
111 VECTOR EV_Extension ; 0x130, Extn Instruction Excp (0x26)
|
| A D | entry.S | 76 ; Instruction Error Exception Handler
|
| /linux/Documentation/arch/arm64/ |
| A D | cpu-feature-registers.rst | 115 1) ID_AA64ISAR0_EL1 - Instruction Set Attribute Register 0
208 5) ID_AA64ISAR1_EL1 - Instruction set attribute register 1
290 9) ID_AA64ISAR2_EL1 - Instruction set attribute register 2
334 12) ID_ISAR5_EL1 - AArch32 Instruction Set Attribute Register 5
|
| A D | legacy_instructions.rst | 42 Note: Instruction emulation may not be possible in all cases. See
|
| /linux/tools/perf/Documentation/ |
| A D | perf-amd-ibs.txt | 6 perf-amd-ibs - Support for AMD Instruction-Based Sampling (IBS) with perf tool
17 Instruction-Based Sampling (IBS) provides precise Instruction Pointer (IP)
|
| A D | perf-script.txt | 202 The flags field is synthesized and may have a value when Instruction
218 Instruction Trace decoding. For calls and returns, it will display the
226 Instruction Trace decoding.
229 Instruction Trace decoding.
|
| A D | perf-inject.txt | 66 Decode Instruction Tracing data, replacing it with synthesized events.
|
| /linux/tools/perf/scripts/python/ |
| A D | libxed.py | 80 def Instruction(self): member in LibXED
|
| /linux/Documentation/bpf/standardization/ |
| A D | instruction-set.rst | 5 BPF Instruction Set Architecture (ISA)
149 Instruction encoding
180 The instruction class (see `Instruction classes`_)
267 Instruction classes
272 .. table:: Instruction class
313 the instruction class (see `Instruction classes`_)
613 The instruction class (see `Instruction classes`_)
720 encoding defined in `Instruction encoding`_, and use the 'src_reg' field of the
|
| /linux/Documentation/admin-guide/auxdisplay/ |
| A D | cfag12864b.rst | 71 Select (17)------------------------------(16) Data / Instruction
|
| /linux/Documentation/devicetree/bindings/remoteproc/ |
| A D | ti,pru-rproc.yaml | 16 core has a dedicated Instruction RAM, Control and Debug register sets, and
54 - description: Address and Size of the PRU Instruction RAM
|
| /linux/tools/perf/util/intel-pt-decoder/ |
| A D | intel-pt-insn-decoder.c | 24 #error Instruction buffer size too small
|
| /linux/Documentation/arch/riscv/ |
| A D | cmodx.rst | 8 modified by the program itself. Instruction storage and the instruction cache
|
| /linux/arch/x86/crypto/ |
| A D | crc32c-pcl-intel-asm_64.S | 49 ## ISCSI CRC 32 Implementation with crc32 and pclmulqdq Instruction
|
| /linux/Documentation/sound/cards/ |
| A D | sb-live-mixer.rst | 335 Processor with Instruction Set for Audio Effects (Jan. 14, 1999)
338 Audio Effects Processor having Decoupled Instruction
355 Processor with Instruction Set for Audio Effects (Jul. 27, 1999)
|
| /linux/Documentation/arch/parisc/ |
| A D | registers.rst | 24 CR19 Interrupt Instruction Register
|
| /linux/tools/memory-model/Documentation/ |
| A D | references.txt | 48 For Programmers, Volume II-A: The MIPS64(R) Instruction,
|