Searched refs:KVM_REG_RISCV_CONFIG (Results 1 – 4 of 4) sorted by relevance
188 __u64 reg_off = id & ~(REG_MASK | KVM_REG_RISCV_CONFIG); in config_id_to_str()190 assert((id & KVM_REG_RISCV_TYPE_MASK) == KVM_REG_RISCV_CONFIG); in config_id_to_str()629 case KVM_REG_RISCV_CONFIG: in print_reg()677 KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_CONFIG | KVM_REG_RISCV_CONFIG_REG(isa),678 KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_CONFIG | KVM_REG_RISCV_CONFIG_REG(mvendorid),679 KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_CONFIG | KVM_REG_RISCV_CONFIG_REG(marchid),680 KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_CONFIG | KVM_REG_RISCV_CONFIG_REG(mimpid),681 KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_CONFIG | KVM_REG_RISCV_CONFIG_REG(satp_mode),758 …KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_CONFIG | KVM_REG_RISCV_CONFIG_REG(zicbom_block_…763 …KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_CONFIG | KVM_REG_RISCV_CONFIG_REG(zicboz_block_…
210 KVM_REG_RISCV_CONFIG); in kvm_riscv_vcpu_get_reg_config()259 KVM_REG_RISCV_CONFIG); in kvm_riscv_vcpu_set_reg_config()774 reg = KVM_REG_RISCV | size | KVM_REG_RISCV_CONFIG | i; in copy_config_reg_indices()1211 case KVM_REG_RISCV_CONFIG: in kvm_riscv_vcpu_set_reg()1244 case KVM_REG_RISCV_CONFIG: in kvm_riscv_vcpu_get_reg()
26 #define RISCV_CONFIG_REG(name) __kvm_reg_id(KVM_REG_RISCV_CONFIG, 0, \
220 #define KVM_REG_RISCV_CONFIG (0x01 << KVM_REG_RISCV_TYPE_SHIFT) macro
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