Searched refs:LB_DATA_FORMAT (Results 1 – 10 of 10) sorted by relevance
| /linux/drivers/gpu/drm/amd/display/dc/dce/ |
| A D | dce_transform.h | 39 SRI(LB_DATA_FORMAT, LB, id), \
191 XFM_SF(LB_DATA_FORMAT, PIXEL_DEPTH, mask_sh), \
192 XFM_SF(LB_DATA_FORMAT, PIXEL_EXPAN_MODE, mask_sh), \
252 XFM_SF(LB_DATA_FORMAT, ALPHA_EN, mask_sh)
537 uint32_t LB_DATA_FORMAT; member
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| A D | dce_transform.c | 486 REG_UPDATE(LB_DATA_FORMAT, ALPHA_EN, data->lb_params.alpha_en); in dce_transform_set_scaler()
1019 REG_UPDATE_2(LB_DATA_FORMAT, in dce_transform_set_pixel_storage_depth()
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| /linux/drivers/gpu/drm/amd/display/dc/dpp/dcn10/ |
| A D | dcn10_dpp_dscl.c | 192 REG_SET_7(LB_DATA_FORMAT, 0, in dpp1_dscl_set_lb()
202 REG_SET_2(LB_DATA_FORMAT, 0, in dpp1_dscl_set_lb()
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| A D | dcn10_dpp.h | 59 SRI(LB_DATA_FORMAT, DSCL, id), \
1112 uint32_t LB_DATA_FORMAT; \
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| /linux/drivers/gpu/drm/amd/display/dc/dpp/dcn401/ |
| A D | dcn401_dpp_dscl.c | 194 REG_SET_7(LB_DATA_FORMAT, 0, in dpp401_dscl_set_lb()
204 REG_SET_2(LB_DATA_FORMAT, 0, in dpp401_dscl_set_lb()
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| /linux/drivers/gpu/drm/amd/display/dc/dpp/dcn30/ |
| A D | dcn30_dpp.h | 102 SRI(LB_DATA_FORMAT, DSCL, id), \
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn401/ |
| A D | dcn401_resource.h | 283 SRI_ARR(SCL_MODE, DSCL, id), SRI_ARR(LB_DATA_FORMAT, DSCL, id), \
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| A D | dce_v10_0.c | 2102 tmp = REG_SET_FIELD(tmp, LB_DATA_FORMAT, INTERLEAVE_EN, 1); in dce_v10_0_set_interleave()
2104 tmp = REG_SET_FIELD(tmp, LB_DATA_FORMAT, INTERLEAVE_EN, 0); in dce_v10_0_set_interleave()
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| A D | dce_v11_0.c | 2152 tmp = REG_SET_FIELD(tmp, LB_DATA_FORMAT, INTERLEAVE_EN, 1); in dce_v11_0_set_interleave()
2154 tmp = REG_SET_FIELD(tmp, LB_DATA_FORMAT, INTERLEAVE_EN, 0); in dce_v11_0_set_interleave()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| A D | dcn32_resource.h | 480 SRI_ARR(SCL_MODE, DSCL, id), SRI_ARR(LB_DATA_FORMAT, DSCL, id), \
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