Home
last modified time | relevance | path

Searched refs:MASK (Results 1 – 25 of 126) sorted by relevance

123456

/linux/drivers/iommu/intel/
A Dcap_audit.h67 #define DO_CHECK_FEATURE_MISMATCH(a, b, cap, feature, MASK) \ argument
70 intel_iommu_##cap##_sanity &= ~(MASK); \
75 #define CHECK_FEATURE_MISMATCH(a, b, cap, feature, MASK) \ argument
78 #define CHECK_FEATURE_MISMATCH_HOTPLUG(b, cap, feature, MASK) \ argument
82 (b)->cap, cap, feature, MASK); \
85 #define MINIMAL_FEATURE_IOMMU(iommu, cap, MASK) \ argument
87 u64 min_feature = intel_iommu_##cap##_sanity & (MASK); \
88 min_feature = min_t(u64, min_feature, (iommu)->cap & (MASK)); \
95 if ((intel_iommu_##cap##_sanity & (MASK)) > \
99 (iommu)->cap = ((iommu)->cap & ~(MASK)) | \
[all …]
/linux/include/linux/soc/ti/
A Dknav_dma.h17 #define MASK(x) (BIT(x) - 1) macro
18 #define KNAV_DMA_DESC_PKT_LEN_MASK MASK(22)
22 #define KNAV_DMA_DESC_TAG_MASK MASK(8)
30 #define KNAV_DMA_DESC_PSLEN_MASK MASK(6)
32 #define KNAV_DMA_DESC_ERR_FLAG_MASK MASK(4)
34 #define KNAV_DMA_DESC_PSFLAG_MASK MASK(4)
36 #define KNAV_DMA_DESC_RETQ_MASK MASK(14)
37 #define KNAV_DMA_DESC_BUF_LEN_MASK MASK(22)
38 #define KNAV_DMA_DESC_EFLAGS_MASK MASK(4)
/linux/sound/soc/codecs/
A Dak4613.c425 #define MASK(x) (1 << AK4613_CHANNEL_##x) in ak4613_hw_constraints() macro
428 [AK4613_CONFIG_MODE_STEREO] = { MASK(2), MASK(2), MASK(2), MASK(2)}, in ak4613_hw_constraints()
429 [AK4613_CONFIG_MODE_TDM512] = { MASK(4), MASK(12), MASK(12), MASK(12)}, in ak4613_hw_constraints()
430 [AK4613_CONFIG_MODE_TDM256] = { MASK(4), MASK(8), MASK(8)|MASK(12), MASK(8)|MASK(12)}, in ak4613_hw_constraints()
431 [AK4613_CONFIG_MODE_TDM128] = { MASK(4), MASK(4), MASK(4)|MASK(8), MASK(4)|MASK(8)|MASK(12)}, in ak4613_hw_constraints()
/linux/arch/x86/kernel/cpu/mce/
A Dseverity.c66 #define MASK(x, y) .mask = x, .result = y macro
115 SER, MASK(MCI_UC_AR|MCACOD_SCRUBMSK, MCI_STATUS_UC|MCACOD_SCRUB)
119 SER, MASK(MCI_UC_AR|MCACOD, MCI_STATUS_UC|MCACOD_L3WB)
130 SER, MASK(MCI_STATUS_UC|MCI_ADDR|0xffffeff0, MCI_ADDR|0x001000c0),
137 SER, MASK(MCI_UC_SAR, MCI_STATUS_UC)
142 MASK(MCI_STATUS_OVER|MCI_UC_SAR, MCI_STATUS_UC|MCI_STATUS_AR)
158 SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR, MCI_UC_SAR|MCI_ADDR),
163 SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_DATA),
201 SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR, MCI_UC_SAR)
206 SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR, MCI_UC_S)
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
A Dgk20a.h30 #define MASK(w) ((1 << (w)) - 1) macro
49 (MASK(GPCPLL_CFG3_VCO_CTRL_WIDTH) << GPCPLL_CFG3_VCO_CTRL_SHIFT)
59 (MASK(GPCPLL_COEFF_N_WIDTH) << GPCPLL_COEFF_N_SHIFT)
87 #define GPC2CLK_OUT_VCODIV_MASK (MASK(GPC2CLK_OUT_VCODIV_WIDTH) << \
92 #define GPC2CLK_OUT_INIT_MASK ((MASK(GPC2CLK_OUT_SDIV14_INDIV4_WIDTH) << \
94 | (MASK(GPC2CLK_OUT_VCODIV_WIDTH) << GPC2CLK_OUT_VCODIV_SHIFT)\
95 | (MASK(GPC2CLK_OUT_BYPDIV_WIDTH) << GPC2CLK_OUT_BYPDIV_SHIFT))
A Dgm20b.c41 (MASK(GPCPLL_CFG2_SDM_DIN_WIDTH) << GPCPLL_CFG2_SDM_DIN_SHIFT)
45 (MASK(GPCPLL_CFG2_SDM_DIN_NEW_WIDTH) << GPCPLL_CFG2_SDM_DIN_NEW_SHIFT)
53 (MASK(GPCPLL_DVFS0_DFS_COEFF_WIDTH) << GPCPLL_DVFS0_DFS_COEFF_SHIFT)
169 MASK(GPCPLL_CFG2_SDM_DIN_WIDTH); in gm20b_pllg_read_mnp()
254 rem = ((u32)n) & MASK(DFS_DET_RANGE); in gm20b_dvfs_calc_ndiv()
788 data &= MASK(GPCPLL_CFG3_PLL_DFS_TESTOUT_WIDTH); in gm20b_clk_init_dvfs()
951 MASK(FUSE_RESERVED_CALIB0_FUSE_REV_WIDTH); in gm20b_clk_init_fused_params()
960 MASK(FUSE_RESERVED_CALIB0_SLOPE_INT_WIDTH)) * 1000 + in gm20b_clk_init_fused_params()
962 MASK(FUSE_RESERVED_CALIB0_SLOPE_FRAC_WIDTH)); in gm20b_clk_init_fused_params()
966 MASK(FUSE_RESERVED_CALIB0_INTERCEPT_INT_WIDTH)) * 1000 + in gm20b_clk_init_fused_params()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/gpio/
A Dhw_gpio.c45 REG_GET(MASK_reg, MASK, &gpio->store.mask); in store_registers()
54 REG_UPDATE(MASK_reg, MASK, gpio->store.mask); in restore_registers()
152 REG_UPDATE(MASK_reg, MASK, 1); in dal_hw_gpio_config_mode()
158 REG_UPDATE(MASK_reg, MASK, 1); in dal_hw_gpio_config_mode()
164 REG_UPDATE(MASK_reg, MASK, 1); in dal_hw_gpio_config_mode()
168 REG_UPDATE(MASK_reg, MASK, 0); in dal_hw_gpio_config_mode()
172 REG_UPDATE(MASK_reg, MASK, 0); in dal_hw_gpio_config_mode()
/linux/arch/arm/mach-rpc/
A Dirq.c15 #define MASK 0x08 macro
130 val = readb(base + MASK); in iomd_irq_mask_ack()
131 writeb(val & ~mask, base + MASK); in iomd_irq_mask_ack()
140 val = readb(base + MASK); in iomd_irq_mask()
141 writeb(val & ~mask, base + MASK); in iomd_irq_mask()
149 val = readb(base + MASK); in iomd_irq_unmask()
150 writeb(val | mask, base + MASK); in iomd_irq_unmask()
/linux/arch/x86/crypto/
A Dpoly1305-x86_64-cryptogams.pl1168 vpand $MASK,$H3,$H3
1172 vpand $MASK,$H0,$H0
1176 vpand $MASK,$H4,$H4
1179 vpand $MASK,$H1,$H1
1187 vpand $MASK,$H2,$H2
1191 vpand $MASK,$H0,$H0
1195 vpand $MASK,$H3,$H3
1398 vpand $MASK,$D3,$D3
1402 vpand $MASK,$D0,$D0
1518 my $S4=$MASK;
[all …]
/linux/tools/testing/selftests/bpf/progs/
A Dtest_pkt_md_access.c11 #define TEST_FIELD(TYPE, FIELD, MASK) \ argument
14 if (tmp != ((*(volatile __u32 *)&skb->FIELD) & MASK)) \
19 #define TEST_FIELD(TYPE, FIELD, MASK) \ argument
23 if (tmp != ((*(volatile __u32 *)&skb->FIELD) & MASK)) \
/linux/drivers/scsi/sym53c8xx_2/
A Dsym_fw2.h228 SCR_INT ^ IFTRUE (MASK (SEM, SEM)),
438 SCR_JUMPR ^ IFTRUE (MASK (IRST, IRST)),
462 SCR_JUMP ^ IFTRUE (MASK (WSR, WSR)),
521 SCR_JUMP ^ IFTRUE (MASK (WSS, WSS)),
898 SCR_JUMP ^ IFTRUE (MASK (0x80, 0xbf)),
904 SCR_INT ^ IFFALSE (MASK (0x80, 0x80)),
1269 SCR_JUMP ^ IFTRUE (MASK (0x00, 0xf0)),
1271 SCR_JUMP ^ IFTRUE (MASK (0x10, 0xf0)),
1464 SCR_JUMPR ^ IFFALSE (MASK (WSR, WSR)),
1675 SCR_CALL ^ IFTRUE (MASK (WSR, WSR)),
[all …]
A Dsym_fw1.h236 SCR_INT ^ IFTRUE (MASK (SEM, SEM)),
453 SCR_JUMPR ^ IFTRUE (MASK (IRST, IRST)),
478 SCR_JUMP ^ IFTRUE (MASK (WSR, WSR)),
538 SCR_JUMP ^ IFTRUE (MASK (WSS, WSS)),
949 SCR_JUMP ^ IFTRUE (MASK (0x80, 0xbf)),
955 SCR_INT ^ IFFALSE (MASK (0x80, 0x80)),
1207 SCR_JUMP ^ IFTRUE (MASK (HF_DATA_IN, HF_DATA_IN)),
1390 SCR_JUMP ^ IFTRUE (MASK (0x00, 0xf0)),
1392 SCR_JUMP ^ IFTRUE (MASK (0x10, 0xf0)),
1398 SCR_JUMP ^ IFFALSE (MASK (0x20, 0xf0)),
[all …]
/linux/tools/testing/selftests/kvm/include/aarch64/
A Dgic_v3.h181 GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, MASK)
183 GIC_BASER_CACHEABILITY(GICR_PROPBASER, OUTER, MASK)
208 GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, MASK)
210 GIC_BASER_CACHEABILITY(GICR_PENDBASER, OUTER, MASK)
277 GIC_BASER_CACHEABILITY(GICR_VPROPBASER, INNER, MASK)
279 GIC_BASER_CACHEABILITY(GICR_VPROPBASER, OUTER, MASK)
315 GIC_BASER_CACHEABILITY(GICR_VPENDBASER, INNER, MASK)
419 GIC_BASER_CACHEABILITY(GITS_CBASER, INNER, MASK)
421 GIC_BASER_CACHEABILITY(GITS_CBASER, OUTER, MASK)
446 GIC_BASER_CACHEABILITY(GITS_BASER, INNER, MASK)
[all …]
/linux/include/linux/irqchip/
A Darm-gic-v3.h181 GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, MASK)
183 GIC_BASER_CACHEABILITY(GICR_PROPBASER, OUTER, MASK)
208 GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, MASK)
210 GIC_BASER_CACHEABILITY(GICR_PENDBASER, OUTER, MASK)
277 GIC_BASER_CACHEABILITY(GICR_VPROPBASER, INNER, MASK)
279 GIC_BASER_CACHEABILITY(GICR_VPROPBASER, OUTER, MASK)
315 GIC_BASER_CACHEABILITY(GICR_VPENDBASER, INNER, MASK)
419 GIC_BASER_CACHEABILITY(GITS_CBASER, INNER, MASK)
421 GIC_BASER_CACHEABILITY(GITS_CBASER, OUTER, MASK)
446 GIC_BASER_CACHEABILITY(GITS_BASER, INNER, MASK)
[all …]
/linux/arch/arm/crypto/
A Dpoly1305-armv4.pl1101 vorn $MASK,$MASK,$MASK @ all-ones, can be redundant
1103 vshr.u64 $MASK,$MASK,#38
1145 vorn $MASK,$MASK,$MASK @ all-ones
1147 vshr.u64 $MASK,$MASK,#38
1166 vand.i64 $D3,$D3,$MASK
1168 vand.i64 $D0,$D0,$MASK
1173 vand.i64 $D4,$D4,$MASK
1175 vand.i64 $D1,$D1,$MASK
1181 vand.i64 $D2,$D2,$MASK
1186 vand.i64 $D0,$D0,$MASK
[all …]
A Dghash-ce-core.S59 MASK .req d28
229 vmov.i8 MASK, #0xe1
230 vshl.u64 MASK, MASK, #57
298 vmov.i8 MASK, #0xe1
299 vshl.u64 MASK, MASK, #57
341 vmov.i8 MASK, #0xe1
342 vshl.u64 MASK, MASK, #57
601 vmov.i8 MASK, #0xe1
603 vshl.u64 MASK, MASK, #57
658 vmov.i8 MASK, #0xe1
[all …]
/linux/arch/arm64/crypto/
A Dpoly1305-armv8.pl267 my ($T0,$T1,$MASK) = map("v$_",(29..31));
543 movi $MASK.2d,#-1
547 ushr $MASK.2d,$MASK.2d,#38
709 and $ACC0,$ACC0,$MASK.2d
849 and $ACC3,$ACC3,$MASK.2d
851 and $ACC0,$ACC0,$MASK.2d
857 and $ACC4,$ACC4,$MASK.2d
859 and $ACC1,$ACC1,$MASK.2d
865 and $ACC2,$ACC2,$MASK.2d
870 and $ACC0,$ACC0,$MASK.2d
[all …]
/linux/drivers/gpu/drm/hisilicon/kirin/
A Dkirin_ade_reg.h13 #define MASK(x) (BIT_ULL(x) - 1) macro
17 #define FRM_END_START_MASK MASK(2)
50 #define CH_OVLY_SEL_MASK MASK(2)
99 #define QOSGENERATOR_MODE_MASK MASK(2)
/linux/lib/raid6/
A Ds390vx.uc33 * For each of the 16 bytes in the vector register y the MASK()
38 #define MASK(x, y) fpu_vesravb(x, y, 24)
64 MASK(16+$$,8+$$);
98 MASK(16+$$,8+$$);
108 MASK(16+$$,8+$$);
A Dint.uc62 * The MASK() operation returns 0xFF in any byte for which the high
65 static inline __attribute_const__ unative_t MASK(unative_t v)
92 w2$$ = MASK(wq$$);
122 w2$$ = MASK(wq$$);
130 w2$$ = MASK(wq$$);
/linux/net/openvswitch/
A Ddatapath.h277 #define OVS_MASKED(OLD, KEY, MASK) ((KEY) | ((OLD) & ~(MASK))) argument
278 #define OVS_SET_MASKED(OLD, KEY, MASK) ((OLD) = OVS_MASKED(OLD, KEY, MASK)) argument
/linux/drivers/scsi/
A Dvmw_pvscsi.h31 #define MASK(n) ((1 << (n)) - 1) /* make an n-bit mask */ macro
410 #define PVSCSI_INTR_CMPL_MASK MASK(2)
414 #define PVSCSI_INTR_MSG_MASK (MASK(2) << 2)
416 #define PVSCSI_INTR_ALL_SUPPORTED MASK(4)
/linux/drivers/clk/tegra/
A Dclk-tegra-periph.c130 #define MASK(x) (BIT(x) - 1) macro
135 30, MASK(2), 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP, \
142 30, MASK(2), 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP,\
149 29, MASK(3), 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP,\
168 30, MASK(2), 0, 0, 8, 1, TEGRA_DIVIDER_INT| \
175 30, MASK(2), 0, 0, 8, 1, TEGRA_DIVIDER_INT| \
182 29, MASK(3), 0, 0, 8, 1, TEGRA_DIVIDER_INT| \
189 30, MASK(2), 0, 0, 16, 1, TEGRA_DIVIDER_UART| \
196 29, MASK(3), 0, 0, 16, 1, TEGRA_DIVIDER_UART| \
203 30, MASK(2), 0, 0, 16, 0, TEGRA_DIVIDER_ROUND_UP,\
[all …]
/linux/drivers/dma/dw/
A Dcore.c122 channel_set_bit(dw, MASK.XFER, dwc->mask); in dwc_initialize()
123 channel_set_bit(dw, MASK.ERROR, dwc->mask); in dwc_initialize()
488 channel_set_bit(dw, MASK.XFER, dw->all_chan_mask); in dw_dma_tasklet()
489 channel_set_bit(dw, MASK.ERROR, dw->all_chan_mask); in dw_dma_tasklet()
512 channel_clear_bit(dw, MASK.XFER, dw->all_chan_mask); in dw_dma_interrupt()
523 channel_clear_bit(dw, MASK.XFER, (1 << 8) - 1); in dw_dma_interrupt()
524 channel_clear_bit(dw, MASK.BLOCK, (1 << 8) - 1); in dw_dma_interrupt()
527 channel_clear_bit(dw, MASK.ERROR, (1 << 8) - 1); in dw_dma_interrupt()
1118 channel_clear_bit(dw, MASK.XFER, dwc->mask); in dwc_free_chan_resources()
1119 channel_clear_bit(dw, MASK.BLOCK, dwc->mask); in dwc_free_chan_resources()
[all …]
/linux/drivers/tty/
A Dn_tty.c141 return ldata->read_buf[MASK(i)]; in read_buf()
146 return &ldata->read_buf[MASK(i)]; in read_buf_addr()
152 return ldata->echo_buf[MASK(i)]; in echo_buf()
590 if (MASK(ldata->echo_commit) == MASK(*tail + 1)) in n_tty_process_echo_ops()
603 if (MASK(ldata->echo_commit) == MASK(*tail + 2)) in n_tty_process_echo_ops()
706 while (MASK(ldata->echo_commit) != MASK(tail)) { in __process_echoes()
982 while (MASK(ldata->read_head) != MASK(ldata->canon_head)) { in eraser()
990 MASK(head) != MASK(ldata->canon_head)); in eraser()
1032 while (MASK(tail) != MASK(ldata->canon_head)) { in eraser()
1301 while (MASK(tail) != MASK(ldata->read_head)) { in n_tty_receive_char_canon()
[all …]

Completed in 66 milliseconds

123456