Searched refs:MDC (Results 1 – 25 of 38) sorted by relevance
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| /linux/Documentation/devicetree/bindings/dma/ |
| A D | img-mdc-dma.txt | 1 * IMG Multi-threaded DMA Controller (MDC)
5 - reg: Must contain the base address and length of the MDC registers.
10 - sys: MDC system interface clock.
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| /linux/arch/powerpc/boot/dts/ |
| A D | kmeter1.dts | 149 0 2 1 0 1 0 /* MDC */
175 0 2 1 0 1 0 /* MDC */
201 0 2 1 0 1 0 /* MDC */
221 0 2 1 0 1 0 /* MDC */
239 0 2 1 0 1 0 /* MDC */
257 0 2 1 0 1 0 /* MDC */
275 0 2 1 0 1 0 /* MDC */
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| /linux/arch/arm/boot/dts/st/ |
| A D | stm32mp151a-prtt1l.dtsi | 40 /* DP83TD510E PHYs have max MDC rate of 1.75MHz. Since we can't reduce
41 * stmmac MDC clock without reducing system bus rate, we need to use
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| /linux/Documentation/devicetree/bindings/net/ |
| A D | mdio-gpio.yaml | 32 - description: MDC
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| A D | fsl,fman-mdio.yaml | 33 from which the MDC frequency is derived.
50 become corrupt unless it is read within 16 MDC cycles
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| A D | qcom,ipq4019-mdio.yaml | 53 MDC rate is feed by an external clock (fixed 100MHz) and is divider
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| /linux/arch/arm/boot/dts/gemini/ |
| A D | gemini-sq201.dts | 58 /* Uses MDC and MDIO */
59 gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
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| A D | gemini-ns2502.dts | 34 gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
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| A D | gemini-sl93512r.dts | 73 /* Uses MDC and MDIO */
74 gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
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| A D | gemini-ssi1328.dts | 34 gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
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| A D | gemini-dlink-dns-313.dts | 154 /* Uses MDC and MDIO */
155 gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
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| A D | gemini-rut1xx.dts | 61 gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
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| A D | gemini-wbd111.dts | 73 gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
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| A D | gemini-wbd222.dts | 72 gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
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| A D | gemini-nas4220b.dts | 67 gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
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| /linux/arch/arm/boot/dts/ti/omap/ |
| A D | am335x-netcan-plus-1xx.dts | 92 "MDC",
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| A D | am335x-baltos-ir2110.dts | 88 "MDC",
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| A D | am335x-netcom-plus-2xx.dts | 100 "MDC",
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| A D | am335x-netcom-plus-8xx.dts | 132 "MDC",
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| /linux/drivers/net/ethernet/sis/ |
| A D | sis900.h | 61 MDC = 0x00000040, MDDIR = 0x00000020, MDIO = 0x00000010, /* 7016 specific */ enumerator
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| A D | sis900.c | 874 sw32(mear, MDIO | MDDIR | MDC); in mdio_idle()
886 sw32(mear, MDDIR | MDIO | MDC); in mdio_reset()
918 sw32(mear, dataval | MDC); in mdio_read()
927 sw32(mear, MDC); in mdio_read()
964 sw8(mear, dataval | MDC); in mdio_write()
975 sw32(mear, dataval | MDC); in mdio_write()
984 sw8(mear, MDC); in mdio_write()
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| /linux/Documentation/devicetree/bindings/net/dsa/ |
| A D | realtek.yaml | 51 description: GPIO line for the MDC clock line.
152 /* 22 = MDIO (has input reads), 21 = MDC (clock, output only) */
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| /linux/arch/arm/boot/dts/microchip/ |
| A D | lan966x-pcb8290.dts | 30 /* MDC, MDIO */
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| A D | lan966x-kontron-kswitch-d10-mmt.dtsi | 62 /* MDC, MDIO */
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| /linux/Documentation/devicetree/bindings/pinctrl/ |
| A D | mediatek,mt7622-pinctrl.yaml | 289 I2S3_OUT, I2S4_OUT, GPIO_B, MDC, MDIO, G2_TXD0, G2_TXD1,
394 pins = "MDC";
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