Home
last modified time | relevance | path

Searched refs:MMSCH_V4_0_INSERT_DIRECT_WT (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
A Dvcn_v4_0_3.c971 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0, in vcn_v4_0_3_start_sriov()
976 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0, in vcn_v4_0_3_start_sriov()
978 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0, in vcn_v4_0_3_start_sriov()
980 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0, in vcn_v4_0_3_start_sriov()
982 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0, in vcn_v4_0_3_start_sriov()
988 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0, in vcn_v4_0_3_start_sriov()
991 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0, in vcn_v4_0_3_start_sriov()
994 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0, in vcn_v4_0_3_start_sriov()
997 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0, in vcn_v4_0_3_start_sriov()
1013 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0, in vcn_v4_0_3_start_sriov()
[all …]
A Dvcn_v4_0.c1363 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, in vcn_v4_0_start_sriov()
1368 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, in vcn_v4_0_start_sriov()
1371 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, in vcn_v4_0_start_sriov()
1374 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, in vcn_v4_0_start_sriov()
1377 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, in vcn_v4_0_start_sriov()
1383 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, in vcn_v4_0_start_sriov()
1386 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, in vcn_v4_0_start_sriov()
1389 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, in vcn_v4_0_start_sriov()
1392 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, in vcn_v4_0_start_sriov()
1428 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, in vcn_v4_0_start_sriov()
[all …]
A Dmmsch_v4_0.h115 #define MMSCH_V4_0_INSERT_DIRECT_WT(reg, value) { \ macro
A Djpeg_v4_0.c450 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(JPEG, 0, in jpeg_v4_0_start_sriov()
453 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(JPEG, 0, in jpeg_v4_0_start_sriov()
456 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(JPEG, 0, in jpeg_v4_0_start_sriov()
A Djpeg_v4_0_3.c227 MMSCH_V4_0_INSERT_DIRECT_WT(tmp, lower_32_bits(ring->gpu_addr)); in jpeg_v4_0_3_start_sriov()
229 MMSCH_V4_0_INSERT_DIRECT_WT(tmp, upper_32_bits(ring->gpu_addr)); in jpeg_v4_0_3_start_sriov()
231 MMSCH_V4_0_INSERT_DIRECT_WT(tmp, ring->ring_size / 4); in jpeg_v4_0_3_start_sriov()

Completed in 24 milliseconds