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Searched refs:MP0_HWIP (Results 1 – 20 of 20) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
A Dpsp_v13_0.c92 amdgpu_ucode_ip_version_decode(adev, MP0_HWIP, ucode_prefix, sizeof(ucode_prefix)); in psp_v13_0_init_microcode()
94 switch (amdgpu_ip_version(adev, MP0_HWIP, 0)) { in psp_v13_0_init_microcode()
179 ((amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 6) || in psp_v13_0_wait_for_bootloader()
180 amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 14))) ? in psp_v13_0_wait_for_bootloader()
205 if (amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 6) || in psp_v13_0_wait_for_bootloader_steady_state()
206 amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 14)) { in psp_v13_0_wait_for_bootloader_steady_state()
770 if (amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 10)) { in psp_v13_0_fatal_error_recovery_quirk()
800 if ((amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 6) || in psp_v13_0_get_ras_capability()
801 amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 14)) && in psp_v13_0_get_ras_capability()
817 if (amdgpu_ip_version(adev, MP0_HWIP, 0) != IP_VERSION(13, 0, 6)) in psp_v13_0_is_aux_sos_load_required()
A Damdgpu_psp.c104 switch (amdgpu_ip_version(adev, MP0_HWIP, 0)) { in psp_check_pmfw_centralized_cstate_management()
132 switch (amdgpu_ip_version(adev, MP0_HWIP, 0)) { in psp_init_sriov_microcode()
170 switch (amdgpu_ip_version(adev, MP0_HWIP, 0)) { in psp_early_init()
865 switch (amdgpu_ip_version(psp->adev, MP0_HWIP, 0)) { in psp_skip_tmr()
1358 return (amdgpu_ip_version(psp->adev, MP0_HWIP, 0) == in psp_xgmi_peer_link_info_supported()
1361 amdgpu_ip_version(psp->adev, MP0_HWIP, 0) >= in psp_xgmi_peer_link_info_supported()
1477 amdgpu_ip_version(psp->adev, MP0_HWIP, 0) == in psp_xgmi_get_topology_info()
1479 amdgpu_ip_version(psp->adev, MP0_HWIP, 0) == in psp_xgmi_get_topology_info()
2836 (amdgpu_ip_version(adev, MP0_HWIP, 0) == in psp_load_non_psp_fw()
2838 amdgpu_ip_version(adev, MP0_HWIP, 0) == in psp_load_non_psp_fw()
[all …]
A Dpsp_v13_0_4.c41 amdgpu_ucode_ip_version_decode(adev, MP0_HWIP, ucode_prefix, sizeof(ucode_prefix)); in psp_v13_0_4_init_microcode()
43 switch (amdgpu_ip_version(adev, MP0_HWIP, 0)) { in psp_v13_0_4_init_microcode()
A Ddimgrey_cavefish_reg_init.c40 adev->reg_offset[MP0_HWIP][i] = (uint32_t *)(&(MP0_BASE.instance[i])); in dimgrey_cavefish_reg_base_init()
A Daldebaran_reg_init.c39 adev->reg_offset[MP0_HWIP][i] = (uint32_t *)(&(MP0_BASE.instance[i])); in aldebaran_reg_base_init()
A Darct_reg_init.c39 adev->reg_offset[MP0_HWIP][i] = (uint32_t *)(&(MP0_BASE.instance[i])); in arct_reg_base_init()
A Dpsp_v10_0.c54 amdgpu_ucode_ip_version_decode(adev, MP0_HWIP, ucode_prefix, sizeof(ucode_prefix)); in psp_v10_0_init_microcode()
A Damdgpu_discovery.c215 [MP0_HWIP] = MP0_HWID,
1939 switch (amdgpu_ip_version(adev, MP0_HWIP, 0)) { in amdgpu_discovery_set_psp_ip_blocks()
1992 amdgpu_ip_version(adev, MP0_HWIP, 0)); in amdgpu_discovery_set_psp_ip_blocks()
2443 adev->ip_versions[MP0_HWIP][0] = IP_VERSION(9, 0, 0); in amdgpu_discovery_set_ip_blocks()
2465 adev->ip_versions[MP0_HWIP][0] = IP_VERSION(9, 0, 0); in amdgpu_discovery_set_ip_blocks()
2488 adev->ip_versions[MP0_HWIP][0] = IP_VERSION(10, 0, 1); in amdgpu_discovery_set_ip_blocks()
2504 adev->ip_versions[MP0_HWIP][0] = IP_VERSION(10, 0, 0); in amdgpu_discovery_set_ip_blocks()
2526 adev->ip_versions[MP0_HWIP][0] = IP_VERSION(11, 0, 2); in amdgpu_discovery_set_ip_blocks()
2556 adev->ip_versions[MP0_HWIP][0] = IP_VERSION(11, 0, 4); in amdgpu_discovery_set_ip_blocks()
2581 adev->ip_versions[MP0_HWIP][0] = IP_VERSION(13, 0, 2); in amdgpu_discovery_set_ip_blocks()
A Dvega10_reg_init.c39 adev->reg_offset[MP0_HWIP][i] = (uint32_t *)(&(MP0_BASE.instance[i])); in vega10_reg_base_init()
A Damdgpu_ras.c222 if (amdgpu_ip_version(obj->adev, MP0_HWIP, 0) != IP_VERSION(11, 0, 2) && in amdgpu_ras_debugfs_read()
223 amdgpu_ip_version(obj->adev, MP0_HWIP, 0) != IP_VERSION(11, 0, 4)) { in amdgpu_ras_debugfs_read()
1559 if (amdgpu_ip_version(adev, MP0_HWIP, 0) != IP_VERSION(11, 0, 2) && in amdgpu_ras_query_error_count_helper()
1560 amdgpu_ip_version(adev, MP0_HWIP, 0) != IP_VERSION(11, 0, 4)) { in amdgpu_ras_query_error_count_helper()
1961 switch (amdgpu_ip_version(adev, MP0_HWIP, 0)) { in amdgpu_ras_aca_is_supported()
2411 if (amdgpu_ip_version(adev, MP0_HWIP, 0) != in amdgpu_ras_log_on_err_counter()
2413 amdgpu_ip_version(adev, MP0_HWIP, 0) != in amdgpu_ras_log_on_err_counter()
2415 amdgpu_ip_version(adev, MP0_HWIP, 0) != in amdgpu_ras_log_on_err_counter()
3296 switch (amdgpu_ip_version(adev, MP0_HWIP, 0)) { in amdgpu_ras_asic_supported()
3307 switch (amdgpu_ip_version(adev, MP0_HWIP, 0)) { in amdgpu_ras_asic_supported()
[all …]
A Dvega20_reg_init.c39 adev->reg_offset[MP0_HWIP][i] = (uint32_t *)(&(MP0_BASE.instance[i])); in vega20_reg_base_init()
A Dpsp_v11_0.c96 amdgpu_ucode_ip_version_decode(adev, MP0_HWIP, ucode_prefix, sizeof(ucode_prefix)); in psp_v11_0_init_microcode()
98 switch (amdgpu_ip_version(adev, MP0_HWIP, 0)) { in psp_v11_0_init_microcode()
A Dpsp_v14_0.c63 amdgpu_ucode_ip_version_decode(adev, MP0_HWIP, ucode_prefix, sizeof(ucode_prefix)); in psp_v14_0_init_microcode()
65 switch (amdgpu_ip_version(adev, MP0_HWIP, 0)) { in psp_v14_0_init_microcode()
A Dpsp_v12_0.c55 amdgpu_ucode_ip_version_decode(adev, MP0_HWIP, ucode_prefix, sizeof(ucode_prefix)); in psp_v12_0_init_microcode()
A Dpsp_v3_1.c65 amdgpu_ucode_ip_version_decode(adev, MP0_HWIP, ucode_prefix, sizeof(ucode_prefix)); in psp_v3_1_init_microcode()
A Dsoc15.c1455 if ((amdgpu_ip_version(adev, MP0_HWIP, 0) != IP_VERSION(13, 0, 2)) && in soc15_common_get_clockgating_state()
1456 (amdgpu_ip_version(adev, MP0_HWIP, 0) != IP_VERSION(13, 0, 6)) && in soc15_common_get_clockgating_state()
1457 (amdgpu_ip_version(adev, MP0_HWIP, 0) != IP_VERSION(13, 0, 14))) { in soc15_common_get_clockgating_state()
A Damdgpu_ucode.c1177 if (block_type == MP0_HWIP) { in amdgpu_ucode_legacy_naming()
1178 switch (amdgpu_ip_version(adev, MP0_HWIP, 0)) { in amdgpu_ucode_legacy_naming()
1406 case MP0_HWIP: in amdgpu_ucode_ip_version_decode()
A Damdgpu_dev_coredump.c52 [MP0_HWIP] = "MP0",
A Damdgpu_virt.c874 switch (amdgpu_ip_version(adev, MP0_HWIP, 0)) { in amdgpu_virt_fw_load_skip_check()
A Damdgpu.h708 MP0_HWIP, enumerator

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