NUM_FCLK_DPM_LEVELS (reference) in projects: linux

Project(s)

Full Search
Definition
Symbol
File Path
Type

Searched refs:NUM_FCLK_DPM_LEVELS (Results 1 – 21 of 21) sorted by relevance

/linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/
A D	smu14_driver_if_v14_0_0.h	`106 #define NUM_FCLK_DPM_LEVELS 8 macro 128 uint32_t FclkClocks_Freq[NUM_FCLK_DPM_LEVELS]; 129 uint32_t FclkClocks_Voltage[NUM_FCLK_DPM_LEVELS]; 159 uint32_t FclkClocks_Freq[NUM_FCLK_DPM_LEVELS]; 160 uint32_t FclkClocks_Voltage[NUM_FCLK_DPM_LEVELS];`
A D	smu12_driver_if.h	`107 #define NUM_FCLK_DPM_LEVELS 4 macro 119 DpmClock_t FClocks[NUM_FCLK_DPM_LEVELS];`
A D	smu11_driver_if_vangogh.h	`110 #define NUM_FCLK_DPM_LEVELS 4 macro 138 df_pstate_t DfPstateTable[NUM_FCLK_DPM_LEVELS];`
A D	smu13_driver_if_aldebaran.h	`34 #define NUM_FCLK_DPM_LEVELS 8 macro 302 uint32_t FidTableFclk[NUM_FCLK_DPM_LEVELS]; //PPCLK_FCLK 303 uint8_t DidTableFclk[NUM_FCLK_DPM_LEVELS]; //PPCLK_FCLK`
A D	smu13_driver_if_v13_0_7.h	`45 #define NUM_FCLK_DPM_LEVELS 8 macro 1060 uint16_t FreqTableFclk [NUM_FCLK_DPM_LEVELS ]; // In MHz 1131 …uint8_t FclkDpmUPstates[NUM_FCLK_DPM_LEVELS]; // U P-state ID associated with each FCLK DPM s… 1132 …uint16_t FclkDpmVddU[NUM_FCLK_DPM_LEVELS]; // mV(Q2) Vset U voltage associated with each FCLK … 1133 uint16_t FclkDpmUSpeed[NUM_FCLK_DPM_LEVELS]; //U speed associated with each FCLK DPM state 1404 uint16_t FreqTableFclk [NUM_FCLK_DPM_LEVELS ]; // In MHz`
A D	smu13_driver_if_v13_0_0.h	`44 #define NUM_FCLK_DPM_LEVELS 8 macro 1051 uint16_t FreqTableFclk [NUM_FCLK_DPM_LEVELS ]; // In MHz 1129 …uint8_t FclkDpmUPstates[NUM_FCLK_DPM_LEVELS]; // U P-state ID associated with each FCLK DPM s… 1130 …uint16_t FclkDpmVddU[NUM_FCLK_DPM_LEVELS]; // mV(Q2) Vset U voltage associated with each FCLK … 1131 uint16_t FclkDpmUSpeed[NUM_FCLK_DPM_LEVELS]; //U speed associated with each FCLK DPM state 1411 uint16_t FreqTableFclk [NUM_FCLK_DPM_LEVELS ]; // In MHz`
A D	smu11_driver_if_arcturus.h	`40 #define NUM_FCLK_DPM_LEVELS 8 macro 50 #define MAX_FCLK_DPM_LEVEL (NUM_FCLK_DPM_LEVELS - 1) 520 uint16_t FreqTableFclk [NUM_FCLK_DPM_LEVELS ]; // In MHz`
A D	smu11_driver_if_sienna_cichlid.h	`48 #define NUM_FCLK_DPM_LEVELS 8 macro 67 #define MAX_FCLK_DPM_LEVEL (NUM_FCLK_DPM_LEVELS - 1) 691 uint16_t FreqTableFclk [NUM_FCLK_DPM_LEVELS ]; // In MHz 1051 uint16_t FreqTableFclk [NUM_FCLK_DPM_LEVELS ]; // In MHz`
A D	smu_v13_0_6_pmfw.h	`31 #define NUM_FCLK_DPM_LEVELS 4 macro`
A D	smu14_driver_if_v14_0.h	`42 #define NUM_FCLK_DPM_LEVELS 8 macro 1151 uint16_t FreqTableFclk [NUM_FCLK_DPM_LEVELS ]; // In MHz 1636 uint16_t FreqTableFclk [NUM_FCLK_DPM_LEVELS ]; // In MHz`
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/
A D	dcn35_smu.h	`83 #define NUM_FCLK_DPM_LEVELS 8 macro 111 uint32_t FclkClocks_Freq[NUM_FCLK_DPM_LEVELS]; 112 uint32_t FclkClocks_Voltage[NUM_FCLK_DPM_LEVELS];`
A D	dcn35_clk_mgr.c	`835 num_fclk = (clock_table->NumFclkLevelsEnabled > NUM_FCLK_DPM_LEVELS) ? NUM_FCLK_DPM_LEVELS : in dcn35_clk_mgr_helper_populate_bw_params() 895 find_max_clk_value(clock_table->FclkClocks_Freq, NUM_FCLK_DPM_LEVELS); in dcn35_clk_mgr_helper_populate_bw_params()`
/linux/drivers/gpu/drm/amd/pm/powerplay/inc/
A D	smu10_driver_if.h	`102 #define NUM_FCLK_DPM_LEVELS 4 macro 113 DpmClock_t FClocks[NUM_FCLK_DPM_LEVELS];`
A D	smu11_driver_if.h	`43 #define NUM_FCLK_DPM_LEVELS 8 macro 58 #define MAX_FCLK_DPM_LEVEL (NUM_FCLK_DPM_LEVELS - 1) 426 uint16_t FreqTableFclk [NUM_FCLK_DPM_LEVELS ];`
/linux/drivers/gpu/drm/amd/pm/swsmu/smu12/
A D	renoir_ppt.c	`218 if (dpm_level >= NUM_FCLK_DPM_LEVELS) in renoir_get_dpm_clk_limited() 228 if (dpm_level >= NUM_FCLK_DPM_LEVELS) in renoir_get_dpm_clk_limited() 572 count = NUM_FCLK_DPM_LEVELS; in renoir_print_clk_levels() 772 for (i = 0; i < NUM_FCLK_DPM_LEVELS; i++) { in renoir_get_dpm_clock_table()`
/linux/drivers/gpu/drm/amd/pm/swsmu/smu11/
A D	vangogh_ppt.c	`2203 for (i = 0; i < NUM_FCLK_DPM_LEVELS; i++) { in vangogh_get_dpm_clock_table() 2208 for (i = 0; i < NUM_FCLK_DPM_LEVELS; i++) { in vangogh_get_dpm_clock_table()`
A D	arcturus_ppt.c	`1762 for (i = 0; i < NUM_FCLK_DPM_LEVELS; i++) in arcturus_dump_pptable()`
A D	sienna_cichlid_ppt.c	`2754 for (i = 0; i < NUM_FCLK_DPM_LEVELS; i++) in beige_goby_dump_pptable() 3393 for (i = 0; i < NUM_FCLK_DPM_LEVELS; i++) in sienna_cichlid_dump_pptable()`
/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
A D	vega20_processpptables.c	`336 for (i = 0; i < NUM_FCLK_DPM_LEVELS; i++)`
A D	smu10_hwmgr.c	`516 NUM_FCLK_DPM_LEVELS, in smu10_populate_clock_table()`
A D	vega20_hwmgr.c	`3620 PP_ASSERT_WITH_CODE(dpm_table->count <= NUM_FCLK_DPM_LEVELS, in vega20_set_fclk_to_highest_dpm_level()`

Completed in 97 milliseconds