Searched refs:NvU32 (Results 1 – 25 of 35) sorted by relevance
12
36 NvU32 displayId;38 NvU32 cmd;39 NvU32 addr;41 NvU32 size;42 NvU32 replyType;61 NvU32 displayId;62 NvU32 cmd;63 NvU32 data;64 NvU32 err;180 NvU32 mute;[all …]
35 NvU32 displayId;37 NvU32 flags;47 NvU32 displayId;48 NvU32 flags;50 NvU32 count;53 NvU32 type;56 NvU32 platform;79 NvU32 headMask;132 NvU32 index;133 NvU32 type;[all …]
32 NvU32 subDeviceInstance;33 NvU32 displayId;34 NvU32 flags;35 NvU32 flags2;112 NvU32 displayId;113 NvU32 numELDSize;116 NvU32 ctrl;117 NvU32 deviceEntry;131 NvU32 displayId;138 NvU32 displayMask;[all …]
32 NvU32 subDeviceInstance;33 NvU32 flags;34 NvU32 numHeads;41 NvU32 displayMask;42 NvU32 displayMaskDDC;49 NvU32 flags;50 NvU32 displayMask;51 NvU32 retryTimeMs;58 NvU32 head;59 NvU32 flags;[all …]
31 NvU32 encoderColorFormatMask;32 NvU32 lineBufferSizeKB;33 NvU32 rateBufferSizeKB;34 NvU32 bitsPerPixelPrecision;35 NvU32 maxNumHztSlices;36 NvU32 lineBufferBitDepth;
36 NvU32 hClass;37 NvU32 flags;39 NvU32 format;67 NvU32 hClass;70 NvU32 flags;79 NvU32 cmd;82 NvU32 flags;99 NvU32 data;110 NvU32 chid;112 NvU32 scope;[all …]
31 NvU32 nameOffset;33 NvU32 data;34 NvU32 length;39 NvU32 size;40 NvU32 numEntries;
39 NvU32 bootloaderSize;42 NvU32 riscvElfOffset;43 NvU32 riscvElfSize;49 NvU32 manifestOffset;50 NvU32 manifestSize;55 NvU32 monitorDataSize;60 NvU32 monitorCodeSize;66 NvU32 swbromCodeSize;71 NvU32 swbromDataSize;75 NvU32 fbReservedSize;[all …]
56 NvU32 addr;57 NvU32 val;62 NvU32 addr;63 NvU32 mask;64 NvU32 val;69 NvU32 addr;70 NvU32 mask;71 NvU32 val;73 NvU32 error;78 NvU32 val;[all …]
32 NvU32 feHwSysCap;35 NvU32 numHeads;37 NvU32 i2cPort;46 NvU32 size;47 NvU32 alignment;61 NvU32 engDesc;62 NvU32 ctxAttr;65 NvU32 registerBase;91 NvU32 cacheSnoop;92 NvU32 hclass;[all …]
39 NvU32 physAttr;64 NvU32 engineType;66 NvU32 ChID;78 NvU32 gpcMask;82 NvU32 gpcId;83 NvU32 tpcMask;87 NvU32 gpcId;88 NvU32 zcullMask;94 NvU32 index;95 NvU32 flags;[all …]
37 NvU32 engineData[NV2080_CTRL_FIFO_GET_DEVICE_INFO_TABLE_ENGINE_DATA_TYPES];38 NvU32 pbdmaIds[NV2080_CTRL_FIFO_GET_DEVICE_INFO_TABLE_ENGINE_MAX_PBDMA];39 NvU32 pbdmaFaultIds[NV2080_CTRL_FIFO_GET_DEVICE_INFO_TABLE_ENGINE_MAX_PBDMA];40 NvU32 numPbdmas;45 NvU32 baseIndex;46 NvU32 numEntries;
32 NvU32 event;33 NvU32 action;35 NvU32 info32;
42 NvU32 totalVFs;54 NvU32 version;55 NvU32 regBankCount;61 NvU32 maxSPPerSM;62 NvU32 rtCoreCount;77 NvU32 sriovMaxGfid;86 NvU32 fbio_mask;87 NvU32 fb_bus_width;88 NvU32 fb_ram_type;89 NvU32 fbp_mask;[all …]
31 NvU32 pageTableEntryCount;39 NvU32 oldLevel;40 NvU32 flags;48 NvU32 gpuInstance;
93 NvU32 flags;110 NvU32 size;111 NvU32 prohibitMultipleInstances;112 NvU32 engineInstance; // Select NVDEC0 or NVDEC1 or NVDEC2117 NvU32 size;124 NvU32 size;126 NvU32 engineInstance;131 NvU32 size;132 NvU32 prohibitMultipleInstances; // Prohibit multiple allocations of OFA?137 NvU32 index;[all …]
74 NvU32 version; // queue version75 NvU32 size; // bytes, page aligned76 NvU32 msgSize; // entry size, bytes, must be power-of-2, 16 is minimum77 NvU32 msgCount; // number of entries in queue78 NvU32 writePtr; // message id of next slot79 NvU32 flags; // if set it means "i want to swap RX"80 NvU32 rxHdrOff; // Offset of msgqRxHeader from start of backing store.81 NvU32 entryOff; // Offset of entries from start of backing store.94 NvU32 readPtr; // message id of last message read
33 NvU32 addressSpace;34 NvU32 cacheAttrib;127 NvU32 gpFifoEntries; // number of GP FIFO entries129 NvU32 flags;142 NvU32 engineType;144 NvU32 cid;146 NvU32 subDeviceId;155 NvU32 internalFlags; // reserved158 NvU32 ProcessID; // reserved159 NvU32 SubProcessID; // reserved[all …]
69 NvU32 gspFwHeapFreeListWprOffset;70 NvU32 unused0;130 NvU32 elfCodeOffset;131 NvU32 elfDataOffset;132 NvU32 elfCodeSize;133 NvU32 elfDataSize;136 NvU32 lsUcodeVersion;142 NvU32 partitionRpcPadding[4];148 NvU32 sizeOfCrashReportQueue;151 NvU32 lsUcodeVersionPadding[1];
33 NvU32 acpiIdListLen;34 NvU32 acpiIdList[NV0073_CTRL_SYSTEM_ACPI_ID_MAP_MAX_DISPLAYS];40 NvU32 jtCaps;47 NvU32 acpiId;48 NvU32 mode;54 NvU32 tableLen;62 NvU32 optimusCaps;
40 NvU32 headIndex;41 NvU32 maxHResolution;42 NvU32 maxVResolution;47 NvU32 numHeads;48 NvU32 maxNumHeads;
31 NvU32 idr:2;32 NvU32 reserved1:14;33 NvU32 length:16;
54 NvU32 plugDisplayMask;55 NvU32 unplugDisplayMask;59 NvU32 displayId;
43 NvU32 subDeviceId;67 NvU32 numLevelsToCopy;86 NvU32 aperture;
12 typedef u32 NvU32; typedef18 typedef NvU32 NvHandle;23 typedef NvU32 NV_STATUS;
Completed in 49 milliseconds