Searched refs:OSC (Results 1 – 12 of 12) sorted by relevance
| /linux/Documentation/devicetree/bindings/clock/ |
| A D | fsl,imx93-anatop.yaml | 13 NXP i.MX93 ANATOP module which contains PLL and OSC to Clock Controller
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| A D | tesla,fsd-clock.yaml | 16 The root clock comes from external OSC clock (24 MHz).
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| /linux/drivers/clk/versatile/ |
| A D | Kconfig | 23 tristate "Clock driver for Versatile Express OSC clock generators"
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| /linux/Documentation/devicetree/bindings/timer/ |
| A D | nvidia,tegra186-timer.yaml | 15 reference generated by USEC, TSC or either clk_m or OSC. Each TMR can be
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| /linux/arch/arm/boot/dts/nxp/imx/ |
| A D | imx6ulz-bsh-smm-m2.dts | 147 MX6UL_PAD_ENET1_RX_EN__OSC32K_32K_OUT 0x4001b031 /* OSC 32Khz wifi clk in */
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| /linux/arch/alpha/kernel/ |
| A D | smc37c93x.c | 56 #define OSC 0x24 macro
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| /linux/Documentation/devicetree/bindings/pci/ |
| A D | rockchip,rk3399-pcie.yaml | 37 description: This property is needed if using 24MHz OSC for RC's PHY.
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| /linux/Documentation/devicetree/bindings/display/samsung/ |
| A D | samsung,exynos-hdmi.yaml | 85 VDD 1.8V HDMI OSC.
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| /linux/drivers/clk/nxp/ |
| A D | clk-lpc32xx.c | 202 LPC32XX_CLK_DEFINE(OSC, "osc", CLK_IGNORE_UNUSED, LPC32XX_CLK_XTAL),
1226 LPC32XX_DEFINE_GATE(OSC, OSC_CTRL, 0, CLK_GATE_SET_TO_DISABLE),
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| /linux/drivers/pinctrl/tegra/ |
| A D | pinctrl-tegra20.c | 2051 MUX_PG(cdev1, OSC, PLLA_OUT, PLLM_OUT1, AUDIO_SYNC, 0x14, 4, 0x88, 2, 0xa8, 0),
2052 MUX_PG(cdev2, OSC, AHB_CLK, APB_CLK, PLLP_OUT4, 0x14, 5, 0x88, 4, 0xa8, 2),
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| /linux/arch/arm/boot/dts/allwinner/ |
| A D | sun8i-a83t.dtsi | 176 * This is called "internal OSC" in some places.
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| /linux/arch/arm64/tools/ |
| A D | sysreg | 2307 Field 15 OSC
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