Searched refs:PCI_L1SS_CTL1_L1_2_MASK (Results 1 – 2 of 2) sorted by relevance
151 PCI_L1SS_CTL1_L1_2_MASK, 0); in pci_restore_aspm_l1ss_state()153 PCI_L1SS_CTL1_L1_2_MASK, 0); in pci_restore_aspm_l1ss_state()160 pl_l1_2_enable = pl_ctl1 & PCI_L1SS_CTL1_L1_2_MASK; in pci_restore_aspm_l1ss_state()161 pl_ctl1 &= ~PCI_L1SS_CTL1_L1_2_MASK; in pci_restore_aspm_l1ss_state()162 cl_l1_2_enable = cl_ctl1 & PCI_L1SS_CTL1_L1_2_MASK; in pci_restore_aspm_l1ss_state()163 cl_ctl1 &= ~PCI_L1SS_CTL1_L1_2_MASK; in pci_restore_aspm_l1ss_state()674 pl1_2_enables = pctl1 & PCI_L1SS_CTL1_L1_2_MASK; in aspm_calc_l12_info()675 cl1_2_enables = cctl1 & PCI_L1SS_CTL1_L1_2_MASK; in aspm_calc_l12_info()680 PCI_L1SS_CTL1_L1_2_MASK, 0); in aspm_calc_l12_info()683 PCI_L1SS_CTL1_L1_2_MASK, 0); in aspm_calc_l12_info()
1100 #define PCI_L1SS_CTL1_L1_2_MASK 0x00000005 macro
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