| /linux/Documentation/devicetree/bindings/iio/adc/ |
| A D | xlnx,zynqmp-ams.yaml | 16 The AMS has two SYSMON blocks which are PL (Programmable Logic) SYSMON and
18 All designs should have AMS registers, but PS and PL are optional. The
19 AMS controller can work with only PS, only PL and both PS and PL
21 should always have AMS module property. Providing PS & PL module is optional.
30 |2 |PL Internal voltage measurement, VCCINT. |Voltage
32 |4 |PL Aux voltage measurement, VCCAUX. |Voltage
50 PL Sysmon |20 |PL temperature measurement. |Temperature
101 Maps the child address space for PS and/or PL.
139 PL-SYSMON is capable of monitoring off chip voltage and temperature.
140 PL-SYSMON block has DRP, JTAG and I2C interface to enable monitoring
[all …]
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| /linux/mm/ |
| A D | percpu-stats.c | 160 #define PL(X) \ in percpu_stats_show() macro
167 PL(unit_size); in percpu_stats_show()
168 PL(static_size); in percpu_stats_show()
169 PL(reserved_size); in percpu_stats_show()
170 PL(dyn_size); in percpu_stats_show()
171 PL(atom_size); in percpu_stats_show()
172 PL(alloc_size); in percpu_stats_show()
175 #undef PL in percpu_stats_show()
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| /linux/arch/x86/crypto/ |
| A D | polyval-clmulni_asm.S | 31 #define PL %xmm8 macro
121 vpslldq $8, MI, PL
123 pxor LO, PL
166 vpclmulqdq $0x00, PL, GSTAR, TMP_XMM # TMP_XMM = T_1 : T_0 = P_0 * g*(x)
168 pxor PL, TMP_XMM # TMP_XMM = P_1 + T_0 : P_0 + T_1
190 vpclmulqdq $0x00, PL, GSTAR, TMP_XMM
200 pxor PL, TMP_XMM
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| /linux/arch/arm64/crypto/ |
| A D | polyval-ce-core.S | 54 PL .req v16 label
150 ext PL.16b, LO.16b, v4.16b, #8
195 pmull TMP_V.1q, PL.1d, GSTAR.1d
199 eor TMP_V.16b, PL.16b, TMP_V.16b
228 pmull TMP_V.1q, PL.1d, GSTAR.1d
238 eor TMP_V.16b, PL.16b, TMP_V.16b
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| /linux/drivers/net/ethernet/chelsio/cxgb4vf/ |
| A D | t4vf_defs.h | 106 T4VF_MOD_MAP(PL, 3, PL_VF_WHOAMI, PL_VF_WHOAMI)
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| /linux/Documentation/devicetree/bindings/fpga/ |
| A D | xlnx,zynqmp-pcap-fpga.yaml | 15 configure the Programmable Logic (PL). The configuration uses the
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| /linux/Documentation/devicetree/bindings/sound/ |
| A D | xlnx,i2s.txt | 1 Device-Tree bindings for Xilinx I2S PL block
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| A D | xlnx,audio-formatter.txt | 1 Device-Tree bindings for Xilinx PL audio formatter
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| /linux/fs/isofs/ |
| A D | rock.h | 110 struct RR_PL_s PL; member
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| /linux/Documentation/misc-devices/ |
| A D | xilinx_sdfec.rst | 41 - Programmable Logic (PL) initialization
54 Programmable Logic (PL) Initialization
57 For PL initialization, supporting logic loads configuration parameters for either
112 SD-FEC core is configured plus if the SD-FEC has not been configured for PL
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| /linux/arch/arm64/boot/dts/allwinner/ |
| A D | sun50i-a64-olinuxino.dts | 206 /* VCC-PL is powered by aldo2 but we cannot add it as the RSB */
207 /* interface used to talk to the PMIC in on the PL pins */
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| /linux/Documentation/devicetree/bindings/pci/ |
| A D | xlnx,xdma-host.yaml | 7 title: Xilinx XDMA PL PCIe Root Port Bridge
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| A D | snps,dw-pcie-ep.yaml | 48 via the PL viewports on the DWC PCIe controllers older than
73 set of viewport CSRs mapped into the PL space. Note iATU is
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| A D | snps,dw-pcie.yaml | 57 via the PL viewports on the DWC PCIe controllers older than
82 set of viewport CSRs mapped into the PL space. Note iATU is
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| A D | snps,dw-pcie-common.yaml | 26 space, Port Logic Registers (PL), Shadow Config-space Registers,
32 is selected. Note the PCIe CFG-space, PL and Shadow registers are
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| /linux/drivers/hid/ |
| A D | wacom_wac.c | 3441 case PL: in wacom_wac_irq()
3705 case PL: in wacom_setup_device_quirks()
3893 case PL: in wacom_setup_pen_input_capabilities()
4463 PL, WACOM_PL_RES, WACOM_PL_RES };
4466 PL, WACOM_PL_RES, WACOM_PL_RES };
4469 PL, WACOM_PL_RES, WACOM_PL_RES };
4472 PL, WACOM_PL_RES, WACOM_PL_RES };
4475 PL, WACOM_PL_RES, WACOM_PL_RES };
4478 PL, WACOM_PL_RES, WACOM_PL_RES };
4481 PL, WACOM_PL_RES, WACOM_PL_RES };
[all …]
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| A D | wacom_wac.h | 199 PL, enumerator
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| /linux/tools/perf/scripts/perl/Perf-Trace-Util/ |
| A D | README | 22 perl Makefile.PL # to create a Makefile for the next step
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| /linux/arch/arm64/boot/dts/xilinx/ |
| A D | zynqmp-zcu111-revA.dts | 45 /* Another 4GB connected to PL */
443 /* refclk5 PL CLK100 */
448 /* refclk6 PL CLK125 */
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| A D | zynqmp-zcu102-revA.dts | 503 /* PL i2c via PCA9306 - u45 */
566 /* refclk6 PL CLK125 */
571 /* refclk7 PL CLK74 */
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| A D | zynqmp-zcu106-revA.dts | 514 /* PL i2c via PCA9306 - u45 */
567 /* refclk6 PL CLK125 */
572 /* refclk7 PL CLK74 */
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| /linux/arch/arm/boot/dts/allwinner/ |
| A D | sun8i-q8-common.dtsi | 68 * Q8 boards use various PL# pins as wifi-en. On other boards
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| /linux/drivers/fpga/ |
| A D | Kconfig | 246 to configure the programmable logic(PL) through PS
255 configure the programmable logic(PL).
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| /linux/Documentation/devicetree/bindings/firmware/xilinx/ |
| A D | xlnx,zynqmp-firmware.yaml | 74 configure the Programmable Logic (PL). The configuration uses the
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| /linux/arch/arm/ |
| A D | Kconfig.platforms | 139 This enables support for the RDA Micro 8810PL SoC family.
|