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Searched refs:PORT_E (Results 1 – 17 of 17) sorted by relevance

/linux/drivers/gpu/drm/i915/display/
A Dintel_fdi.c925 intel_de_write(dev_priv, DP_TP_CTL(PORT_E), in hsw_fdi_link_train()
935 intel_de_write(dev_priv, DDI_BUF_CTL(PORT_E), in hsw_fdi_link_train()
939 intel_de_posting_read(dev_priv, DDI_BUF_CTL(PORT_E)); in hsw_fdi_link_train()
962 temp = intel_de_read(dev_priv, DP_TP_STATUS(PORT_E)); in hsw_fdi_link_train()
983 intel_de_posting_read(dev_priv, DDI_BUF_CTL(PORT_E)); in hsw_fdi_link_train()
986 intel_de_rmw(dev_priv, DP_TP_CTL(PORT_E), DP_TP_CTL_ENABLE, 0); in hsw_fdi_link_train()
987 intel_de_posting_read(dev_priv, DP_TP_CTL(PORT_E)); in hsw_fdi_link_train()
989 intel_wait_ddi_buf_idle(dev_priv, PORT_E); in hsw_fdi_link_train()
999 intel_de_write(dev_priv, DP_TP_CTL(PORT_E), in hsw_fdi_link_train()
1017 intel_de_rmw(dev_priv, DDI_BUF_CTL(PORT_E), DDI_BUF_CTL_ENABLE, 0); in hsw_fdi_disable()
[all …]
A Dintel_display_limits.h89 PORT_E, enumerator
A Dintel_display_device.c520 …__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E),
564 …__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E),
608 ….__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E…
833 …__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E),
A Dintel_crt.c1091 assert_port_valid(dev_priv, PORT_E); in intel_crt_init()
1093 crt->base.port = PORT_E; in intel_crt_init()
A Dintel_ddi.c1073 _skl_ddi_set_iboost(dev_priv, PORT_E, iboost); in skl_ddi_set_iboost()
2770 is_mst && (port == PORT_A || port == PORT_E)); in hsw_ddi_pre_enable_dp()
3267 [PORT_E] = TRANSCODER_A, in gen9_chicken_trans_reg_by_port()
3272 if (drm_WARN_ON(&dev_priv->drm, port < PORT_A || port > PORT_E)) in gen9_chicken_trans_reg_by_port()
3318 if (port == PORT_E) in intel_enable_ddi_hdmi()
3330 if (port == PORT_E) in intel_enable_ddi_hdmi()
4671 if (port == PORT_A || port == PORT_E) { in intel_ddi_max_lanes()
4824 case PORT_E: in port_strap_detected()
A Dintel_display.h138 case PORT_E: in port_identifier()
A Dintel_bios.c2346 [PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT }, in dvo_port_to_port()
2934 else if (port == PORT_E) in init_vbt_missing_defaults()
2939 if (port != PORT_A && port != PORT_E) in init_vbt_missing_defaults()
2942 if (port != PORT_E) in init_vbt_missing_defaults()
A Dintel_dp_aux.c833 if (DISPLAY_VER(display) == 9 && encoder->port == PORT_E) in default_aux_ch()
A Dintel_opregion.c407 if (port == PORT_E) { in intel_opregion_notify_encoder()
A Dintel_hdcp.c459 case PORT_E: in intel_hdcp_get_repeater_ctl()
1195 (DISPLAY_VER(i915) >= 12 || port < PORT_E); in is_hdcp_supported()
A Dintel_ddi_buf_trans.c1178 if (port == PORT_A || port == PORT_E) in skl_buf_trans_num_entries()
A Dintel_dp_mst.c1860 if (DISPLAY_VER(i915) < 11 && port == PORT_E) in intel_dp_mst_encoder_init()
A Dintel_dpll_mgr.c3358 if (port == PORT_D || port == PORT_E) { in icl_get_combo_phy_dpll()
/linux/drivers/gpu/drm/i915/gvt/
A Dedid.c95 port = PORT_E; in cnp_get_port_from_gmbus0()
119 port = PORT_E; in get_port_from_gmbus0()
A Dhandlers.c808 if (offset == i915_mmio_reg_offset(DDI_BUF_CTL(PORT_E))) in ddi_buf_ctl_mmio_write()
809 vgpu_vreg_t(vgpu, DP_TP_STATUS(PORT_E)) in ddi_buf_ctl_mmio_write()
827 u32 ddi_buf_ctl = vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_E)); in fdi_auto_training_started()
829 u32 tx_ctl = vgpu_vreg_t(vgpu, DP_TP_CTL(PORT_E)); in fdi_auto_training_started()
943 vgpu_vreg_t(vgpu, DP_TP_STATUS(PORT_E)) |= in update_fdi_rx_iir_status()
949 calc_index(offset, DP_TP_CTL(PORT_A), DP_TP_CTL(PORT_B), DP_TP_CTL(PORT_E))
2354 MMIO_DH(DDI_BUF_CTL(PORT_E), D_ALL, NULL, ddi_buf_ctl_mmio_write); in init_generic_mmio_info()
2360 MMIO_DH(DP_TP_CTL(PORT_E), D_ALL, NULL, dp_tp_ctl_mmio_write); in init_generic_mmio_info()
2366 MMIO_DH(DP_TP_STATUS(PORT_E), D_ALL, NULL, NULL); in init_generic_mmio_info()
A Ddisplay.c490 intel_vgpu_has_monitor_on_port(vgpu, PORT_E)) { in emulate_monitor_status_change()
/linux/drivers/gpu/drm/i915/
A Dintel_gvt_mmio_table.c494 MMIO_D(PORT_CLK_SEL(PORT_E)); in iterate_generic_mmio()
525 MMIO_D(DDI_BUF_CTL(PORT_E)); in iterate_generic_mmio()
530 MMIO_D(DP_TP_CTL(PORT_E)); in iterate_generic_mmio()
535 MMIO_D(DP_TP_STATUS(PORT_E)); in iterate_generic_mmio()

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