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Searched refs:PORT_PLL_P1_MASK (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/i915/display/
A Dbxt_dpio_phy_regs.h47 #define PORT_PLL_P1_MASK REG_GENMASK(15, 13) macro
48 #define PORT_PLL_P1(p1) REG_FIELD_PREP(PORT_PLL_P1_MASK, (p1))
A Dintel_dpll_mgr.c2065 PORT_PLL_P1_MASK | PORT_PLL_P2_MASK, hw_state->ebb0); in bxt_ddi_pll_enable()
2182 hw_state->ebb0 &= PORT_PLL_P1_MASK | PORT_PLL_P2_MASK; in bxt_ddi_pll_get_hw_state()
2369 clock.p1 = REG_FIELD_GET(PORT_PLL_P1_MASK, hw_state->ebb0); in bxt_ddi_pll_get_freq()
/linux/drivers/gpu/drm/i915/gvt/
A Dhandlers.c584 clock.p1 = REG_FIELD_GET(PORT_PLL_P1_MASK, in bxt_vgpu_get_dp_bitrate()

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