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Searched refs:PPSMC_MSG_SetHardMinSocclkByFreq (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/
A Dsmu_v13_0_1_ppsmc.h63 #define PPSMC_MSG_SetHardMinSocclkByFreq 0x13 ///< Set hard min for SOC CLK macro
A Dsmu_v13_0_4_ppsmc.h72 #define PPSMC_MSG_SetHardMinSocclkByFreq 0x13 ///< Set hard min for SOC CLK macro
A Dsmu_v12_0_ppsmc.h66 #define PPSMC_MSG_SetHardMinSocclkByFreq 0x21 macro
A Dsmu_v14_0_0_ppsmc.h72 #define PPSMC_MSG_SetHardMinSocclkByFreq 0x13 ///< Set hard min for SOC CLK macro
A Dsmu_v11_5_ppsmc.h57 #define PPSMC_MSG_SetHardMinSocclkByFreq 0x17 macro
/linux/drivers/gpu/drm/amd/pm/powerplay/inc/
A Drv_ppsmc.h65 #define PPSMC_MSG_SetHardMinSocclkByFreq 0x21 macro
/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
A Dsmu10_hwmgr.c67 msg = PPSMC_MSG_SetHardMinSocclkByFreq; in smu10_display_clock_voltage_request()
666 PPSMC_MSG_SetHardMinSocclkByFreq, in smu10_dpm_force_dpm_level()
745 PPSMC_MSG_SetHardMinSocclkByFreq, in smu10_dpm_force_dpm_level()
791 PPSMC_MSG_SetHardMinSocclkByFreq, in smu10_dpm_force_dpm_level()
/linux/drivers/gpu/drm/amd/pm/swsmu/smu13/
A Dsmu_v13_0_4_ppt.c90 MSG_MAP(SetHardMinSocclkByFreq, PPSMC_MSG_SetHardMinSocclkByFreq, 1),
A Dyellow_carp_ppt.c87 MSG_MAP(SetHardMinSocclkByFreq, PPSMC_MSG_SetHardMinSocclkByFreq, 1),
/linux/drivers/gpu/drm/amd/pm/swsmu/smu12/
A Drenoir_ppt.c82 MSG_MAP(SetHardMinSocclkByFreq, PPSMC_MSG_SetHardMinSocclkByFreq, 1),
/linux/drivers/gpu/drm/amd/pm/swsmu/smu14/
A Dsmu_v14_0_0_ppt.c113 MSG_MAP(SetHardMinSocclkByFreq, PPSMC_MSG_SetHardMinSocclkByFreq, 1),
/linux/drivers/gpu/drm/amd/pm/swsmu/smu11/
A Dvangogh_ppt.c96 MSG_MAP(SetHardMinSocclkByFreq, PPSMC_MSG_SetHardMinSocclkByFreq, 0),

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