| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| A D | display_mode_vba_util_32.h | 259 double PixelClockBackEnd,
330 double PixelClockBackEnd,
|
| A D | display_mode_vba_util_32.c | 1346 double PixelClockBackEnd, in dml32_CalculateOutputLink() argument
1406 OutputLinkDPLanes, HTotal, HActive, PixelClockBackEnd, in dml32_CalculateOutputLink()
1415 OutputLinkDPLanes, HTotal, HActive, PixelClockBackEnd, in dml32_CalculateOutputLink()
1428 OutputLinkDPLanes, HTotal, HActive, PixelClockBackEnd, in dml32_CalculateOutputLink()
1438 OutputLinkDPLanes, HTotal, HActive, PixelClockBackEnd, in dml32_CalculateOutputLink()
1451 OutputLinkDPLanes, HTotal, HActive, PixelClockBackEnd, in dml32_CalculateOutputLink()
1459 OutputLinkDPLanes, HTotal, HActive, PixelClockBackEnd, in dml32_CalculateOutputLink()
1474 OutputLinkDPLanes, HTotal, HActive, PixelClockBackEnd, in dml32_CalculateOutputLink()
1498 OutputLinkDPLanes, HTotal, HActive, PixelClockBackEnd, in dml32_CalculateOutputLink()
1523 OutputLinkDPLanes, HTotal, HActive, PixelClockBackEnd, in dml32_CalculateOutputLink()
[all …]
|
| A D | display_mode_vba_32.c | 348 v->DSCCLK_calculated[k] = mode_lib->vba.PixelClockBackEnd[k] / 12 in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
352 v->DSCCLK_calculated[k] = mode_lib->vba.PixelClockBackEnd[k] / 6 in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
356 v->DSCCLK_calculated[k] = mode_lib->vba.PixelClockBackEnd[k] / 3 in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
370 mode_lib->vba.PixelClockBackEnd[k], mode_lib->vba.ip.dsc_delay_factor_wa); in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2097 mode_lib->vba.PixelClockBackEnd[k], in dml32_ModeSupportAndSystemConfigurationFull()
2418 mode_lib->vba.PixelClockBackEnd[k], in dml32_ModeSupportAndSystemConfigurationFull()
2466 …if (mode_lib->vba.PixelClockBackEnd[k] / 12.0 / mode_lib->vba.DSCFormatFactor > (1.0 - mode_lib->v… in dml32_ModeSupportAndSystemConfigurationFull()
2470 …if (mode_lib->vba.PixelClockBackEnd[k] / 6.0 / mode_lib->vba.DSCFormatFactor > (1.0 - mode_lib->vb… in dml32_ModeSupportAndSystemConfigurationFull()
2473 …if (mode_lib->vba.PixelClockBackEnd[k] / 3.0 / mode_lib->vba.DSCFormatFactor > (1.0 - mode_lib->vb… in dml32_ModeSupportAndSystemConfigurationFull()
2528 mode_lib->vba.PixelClock[k], mode_lib->vba.PixelClockBackEnd[k], in dml32_ModeSupportAndSystemConfigurationFull()
|
| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| A D | display_mode_vba_20.c | 1787 mode_lib->vba.PixelClockBackEnd[k] / 6 in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1794 mode_lib->vba.PixelClockBackEnd[k] / 3 in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1839 / mode_lib->vba.PixelClockBackEnd[k]; in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
4076 * mode_lib->vba.OutputLinkDPLanes[k] / mode_lib->vba.PixelClockBackEnd[k] * 8.0, in dml20_ModeSupportAndSystemConfigurationFull()
4196 if (mode_lib->vba.PixelClockBackEnd[k] / 6.0 / mode_lib->vba.DSCFormatFactor in dml20_ModeSupportAndSystemConfigurationFull()
4202 if (mode_lib->vba.PixelClockBackEnd[k] / 3.0 / mode_lib->vba.DSCFormatFactor in dml20_ModeSupportAndSystemConfigurationFull()
4240 } else if (mode_lib->vba.PixelClockBackEnd[k] > 3200.0) { in dml20_ModeSupportAndSystemConfigurationFull()
4242 mode_lib->vba.PixelClockBackEnd[k] / 400.0, in dml20_ModeSupportAndSystemConfigurationFull()
4244 } else if (mode_lib->vba.PixelClockBackEnd[k] > 1360.0) { in dml20_ModeSupportAndSystemConfigurationFull()
4246 } else if (mode_lib->vba.PixelClockBackEnd[k] > 680.0) { in dml20_ModeSupportAndSystemConfigurationFull()
[all …]
|
| A D | display_mode_vba_20v2.c | 1823 mode_lib->vba.PixelClockBackEnd[k] / 6 in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1830 mode_lib->vba.PixelClockBackEnd[k] / 3 in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1875 / mode_lib->vba.PixelClockBackEnd[k]; in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
4191 * mode_lib->vba.OutputLinkDPLanes[k] / mode_lib->vba.PixelClockBackEnd[k] * 8.0, in dml20v2_ModeSupportAndSystemConfigurationFull()
4317 if (mode_lib->vba.PixelClockBackEnd[k] / 6.0 / mode_lib->vba.DSCFormatFactor in dml20v2_ModeSupportAndSystemConfigurationFull()
4323 if (mode_lib->vba.PixelClockBackEnd[k] / 3.0 / mode_lib->vba.DSCFormatFactor in dml20v2_ModeSupportAndSystemConfigurationFull()
4361 } else if (mode_lib->vba.PixelClockBackEnd[k] > 3200.0) { in dml20v2_ModeSupportAndSystemConfigurationFull()
4363 mode_lib->vba.PixelClockBackEnd[k] / 400.0, in dml20v2_ModeSupportAndSystemConfigurationFull()
4365 } else if (mode_lib->vba.PixelClockBackEnd[k] > 1360.0) { in dml20v2_ModeSupportAndSystemConfigurationFull()
4367 } else if (mode_lib->vba.PixelClockBackEnd[k] > 680.0) { in dml20v2_ModeSupportAndSystemConfigurationFull()
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
| A D | display_mode_vba_21.c | 1779 mode_lib->vba.PixelClockBackEnd[k] / 6 in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1786 mode_lib->vba.PixelClockBackEnd[k] / 3 in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1831 / mode_lib->vba.PixelClockBackEnd[k]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
4285 * mode_lib->vba.OutputLinkDPLanes[k] / mode_lib->vba.PixelClockBackEnd[k] * 8.0, in dml21_ModeSupportAndSystemConfigurationFull()
4411 if (mode_lib->vba.PixelClockBackEnd[k] / 6.0 / mode_lib->vba.DSCFormatFactor in dml21_ModeSupportAndSystemConfigurationFull()
4417 if (mode_lib->vba.PixelClockBackEnd[k] / 3.0 / mode_lib->vba.DSCFormatFactor in dml21_ModeSupportAndSystemConfigurationFull()
4455 } else if (mode_lib->vba.PixelClockBackEnd[k] > 3200.0) { in dml21_ModeSupportAndSystemConfigurationFull()
4457 mode_lib->vba.PixelClockBackEnd[k] / 400.0, in dml21_ModeSupportAndSystemConfigurationFull()
4459 } else if (mode_lib->vba.PixelClockBackEnd[k] > 1360.0) { in dml21_ModeSupportAndSystemConfigurationFull()
4461 } else if (mode_lib->vba.PixelClockBackEnd[k] > 680.0) { in dml21_ModeSupportAndSystemConfigurationFull()
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| A D | display_mode_vba_31.c | 4272 if (v->PixelClockBackEnd[k] > 3200) {
4301 v->PixelClockBackEnd[k],
4338 v->PixelClockBackEnd[k],
4357 v->PixelClockBackEnd[k],
4380 v->PixelClockBackEnd[k],
4399 v->PixelClockBackEnd[k],
4422 v->PixelClockBackEnd[k],
4441 v->PixelClockBackEnd[k],
4464 v->PixelClockBackEnd[k],
4484 v->PixelClockBackEnd[k],
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| A D | display_mode_vba_314.c | 4359 if (v->PixelClockBackEnd[k] > 3200) {
4388 v->PixelClockBackEnd[k],
4425 v->PixelClockBackEnd[k],
4444 v->PixelClockBackEnd[k],
4467 v->PixelClockBackEnd[k],
4486 v->PixelClockBackEnd[k],
4509 v->PixelClockBackEnd[k],
4528 v->PixelClockBackEnd[k],
4551 v->PixelClockBackEnd[k],
4571 v->PixelClockBackEnd[k],
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/ |
| A D | dml2_core_shared.c | 397 double PixelClockBackEnd,
448 double PixelClockBackEnd);
1223 if (s->PixelClockBackEnd[k] > 4800) { in dml2_core_shared_mode_support()
1225 } else if (s->PixelClockBackEnd[k] > 2400) { in dml2_core_shared_mode_support()
1229 } else if (s->PixelClockBackEnd[k] > 340) { in dml2_core_shared_mode_support()
1256 s->PixelClockBackEnd[k], in dml2_core_shared_mode_support()
1482 s->PixelClockBackEnd[k], in dml2_core_shared_mode_support()
1579 s->PixelClockBackEnd[k]); in dml2_core_shared_mode_support()
6667 double PixelClockBackEnd, in CalculateOutputLink() argument
6953 double PixelClockBackEnd) in DSCDelayRequirement() argument
[all …]
|
| A D | dml2_core_dcn4_calcs.c | 4168 double PixelClockBackEnd, in CalculateOutputLink() argument
4200 dml2_printf("DML::%s: PixelClockBackEnd = %f\n", __func__, PixelClockBackEnd); in CalculateOutputLink()
4453 double PixelClockBackEnd) in DSCDelayRequirement() argument
7475 if (s->PixelClockBackEnd[k] > 4800) { in dml_core_mode_support()
7477 } else if (s->PixelClockBackEnd[k] > 2400) { in dml_core_mode_support()
7479 } else if (s->PixelClockBackEnd[k] > 1200) { in dml_core_mode_support()
7481 } else if (s->PixelClockBackEnd[k] > 340) { in dml_core_mode_support()
7539 s->PixelClockBackEnd[k], in dml_core_mode_support()
7812 s->PixelClockBackEnd[k], in dml_core_mode_support()
7921 s->PixelClockBackEnd[k]); in dml_core_mode_support()
[all …]
|
| A D | dml2_core_shared_types.h | 871 double PixelClockBackEnd[DML2_MAX_PLANES]; member
967 double PixelClockBackEnd[DML2_MAX_PLANES]; member
|
| /linux/drivers/gpu/drm/amd/display/dc/dml2/ |
| A D | display_mode_core.c | 83 dml_float_t PixelClockBackEnd,
744 dml_float_t PixelClockBackEnd);
2697 display_cfg->output.PixelClockBackEnd[k] = display_cfg->timing.PixelClock[k]; in PixelClockAdjustmentForProgressiveToInterlaceUnit()
5349 dml_float_t PixelClockBackEnd, in CalculateOutputLink() argument
5879 dml_float_t PixelClockBackEnd) in DSCDelayRequirement() argument
5907 dml_print("DML::%s: PixelClockBackEnd = %f\n", __func__, PixelClockBackEnd); in DSCDelayRequirement()
6948 if (mode_lib->ms.cache_display_cfg.output.PixelClockBackEnd[k] > 4800) { in dml_core_mode_support()
7101 mode_lib->ms.cache_display_cfg.output.PixelClockBackEnd[k], in dml_core_mode_support()
7368 mode_lib->ms.cache_display_cfg.output.PixelClockBackEnd[k], in dml_core_mode_support()
7482 mode_lib->ms.cache_display_cfg.output.PixelClockBackEnd[k]); in dml_core_mode_support()
[all …]
|
| A D | dml2_utils.c | 124 dml_output_array->PixelClockBackEnd[dst_index] = dml_output_array->PixelClockBackEnd[src_index]; in dml2_util_copy_dml_output()
|
| A D | display_mode_core_structs.h | 570 dml_float_t PixelClockBackEnd[__DML_NUM_PLANES__]; member
|
| A D | dml2_translation_helper.c | 840 out->PixelClockBackEnd[location] = in->timing.pix_clk_100hz / 10000.00; in populate_dml_output_cfg_from_stream_state()
|
| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| A D | display_mode_vba_30.c | 2123 v->DSCCLK_calculated[k] = v->PixelClockBackEnd[k] / 6 in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2126 v->DSCCLK_calculated[k] = v->PixelClockBackEnd[k] / 3 in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
4037 if (v->PixelClockBackEnd[k] > 3200) { in dml30_ModeSupportAndSystemConfigurationFull()
4039 } else if (v->PixelClockBackEnd[k] > 1360) { in dml30_ModeSupportAndSystemConfigurationFull()
4041 } else if (v->PixelClockBackEnd[k] > 680) { in dml30_ModeSupportAndSystemConfigurationFull()
4043 } else if (v->PixelClockBackEnd[k] > 340) { in dml30_ModeSupportAndSystemConfigurationFull()
4066 v->PixelClockBackEnd[k], in dml30_ModeSupportAndSystemConfigurationFull()
4098 v->PixelClockBackEnd[k], in dml30_ModeSupportAndSystemConfigurationFull()
4118 v->PixelClockBackEnd[k], in dml30_ModeSupportAndSystemConfigurationFull()
4138 v->PixelClockBackEnd[k], in dml30_ModeSupportAndSystemConfigurationFull()
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/dml/ |
| A D | display_mode_vba.c | 706 mode_lib->vba.PixelClockBackEnd[mode_lib->vba.NumberOfActivePlanes] = dst->pixel_rate_mhz; in fetch_pipe_params()
1054 mode_lib->vba.PixelClockBackEnd[k] = mode_lib->vba.PixelClock[k]; in PixelClockAdjustmentForProgressiveToInterlaceUnit()
|
| A D | display_mode_vba.h | 477 double PixelClockBackEnd[DC__NUM_DPP__MAX]; member
|