| /linux/drivers/gpu/drm/i915/gvt/ |
| A D | mmio_context.c | 60 {RCS0, HWSTAM, 0x0, false}, /* 0x2098 */
61 {RCS0, INSTPM, 0xffff, true}, /* 0x20c0 */
92 {RCS0, HWSTAM, 0x0, false}, /* 0x2098 */
131 {RCS0, TRVADR, 0, true}, /* 0x4df0 */
132 {RCS0, TRTTE, 0, true}, /* 0x4df4 */
133 {RCS0, _MMIO(0x4dfc), 0, true},
167 [RCS0] = 0xc800,
330 if (req->engine->id != RCS0) in intel_vgpu_restore_inhibit_context()
354 [RCS0] = 0x4260,
411 [RCS0] = 0xc800, in switch_mocs()
[all …]
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| A D | scheduler.c | 101 if (workload->engine->id != RCS0) in sr_oa_regs()
165 if (workload->engine->id == RCS0) { in populate_shadow_context()
218 if (IS_BROADWELL(gvt->gt->i915) && workload->engine->id == RCS0) in populate_shadow_context()
505 if (workload->engine->id == RCS0 && in intel_gvt_scan_and_shadow_workload()
977 if (IS_BROADWELL(rq->i915) && rq->engine->id == RCS0) in update_guest_context()
1703 if (engine->id == RCS0) { in intel_vgpu_create_workload()
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| A D | execlist.c | 49 [RCS0] = RCS_AS_CONTEXT_SWITCH,
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| A D | cmd_parser.c | 427 #define R_RCS BIT(RCS0)
599 [RCS0] = {
1053 if (IS_BROADWELL(s->engine->i915) && s->engine->id != RCS0) { in cmd_handler_lri()
1154 [RCS0] = {
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| A D | handlers.c | 332 engine_mask |= BIT(RCS0); in gdrst_mmio_write()
2085 id = RCS0; in gvt_reg_tlb_control_handler()
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| /linux/drivers/gpu/drm/i915/ |
| A D | i915_pci.c | 87 .platform_engine_mask = BIT(RCS0), \
102 .platform_engine_mask = BIT(RCS0), \
134 .platform_engine_mask = BIT(RCS0), \
197 .platform_engine_mask = BIT(RCS0), \
225 .platform_engine_mask = BIT(RCS0) | BIT(VCS0),
233 .platform_engine_mask = BIT(RCS0) | BIT(VCS0),
239 .platform_engine_mask = BIT(RCS0) | BIT(VCS0), \
381 .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0),
653 BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0),
671 BIT(RCS0) | BIT(BCS0) | BIT(VECS0) |
[all …]
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| A D | i915_irq.c | 1021 intel_engine_cs_irq(to_gt(dev_priv)->engine[RCS0], iir); in i8xx_irq_handler()
1129 intel_engine_cs_irq(to_gt(dev_priv)->engine[RCS0], iir); in i915_irq_handler()
1254 intel_engine_cs_irq(to_gt(dev_priv)->engine[RCS0], in i965_irq_handler()
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| A D | i915_drv.h | 637 ENGINE_INSTANCES_MASK(gt, RCS0, I915_MAX_RCS)
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| A D | i915_gpu_error.c | 1312 case RCS0: in engine_record_registers()
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| /linux/drivers/gpu/drm/i915/selftests/ |
| A D | mock_gem_device.c | 233 to_gt(i915)->engine[RCS0] = mock_engine(i915, "mock", RCS0); in mock_gem_device()
234 if (!to_gt(i915)->engine[RCS0]) in mock_gem_device()
237 if (mock_engine_init(to_gt(i915)->engine[RCS0])) in mock_gem_device()
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| A D | i915_request.c | 218 ce = i915_gem_context_get_engine(ctx[0], RCS0); in igt_request_rewind()
236 ce = i915_gem_context_get_engine(ctx[1], RCS0); in igt_request_rewind()
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| /linux/drivers/gpu/drm/i915/gt/ |
| A D | selftest_engine_cs.c | 151 if (GRAPHICS_VER(engine->i915) < 7 && engine->id != RCS0) in perf_mi_bb_start()
279 if (GRAPHICS_VER(engine->i915) < 7 && engine->id != RCS0) in perf_mi_noop()
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| A D | selftest_gt_pm.c | 104 if (GRAPHICS_VER(engine->i915) < 7 && engine->id != RCS0) in live_gt_clocks()
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| A D | intel_engine_cs.c | 64 [RCS0] = {
402 [RCS0] = GEN11_GRDOM_RENDER, in get_reset_domain()
435 [RCS0] = GEN6_GRDOM_RENDER, in get_reset_domain()
1704 [RCS0] = MSG_IDLE_CS, in __cs_pending_mi_force_wakes()
1787 if (engine->id != RCS0) in intel_engine_get_instdone()
1821 if (engine->id != RCS0) in intel_engine_get_instdone()
1833 if (engine->id == RCS0) in intel_engine_get_instdone()
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| A D | intel_engine_types.h | 112 RCS0 = 0, enumerator
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| A D | intel_engine_user.c | 165 [RENDER_CLASS] = { RCS0, 1 }, in legacy_ring_idx()
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| A D | intel_mocs.c | 570 [RCS0] = __GEN9_RCS0_MOCS0, in mocs_offset()
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| A D | intel_ring_submission.c | 93 case RCS0: in set_hwsp()
942 GEM_BUG_ON(engine->id != RCS0); in switch_context()
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| A D | gen8_engine_cs.c | 171 case RCS0: in gen12_get_aux_inv_reg()
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| A D | intel_execlists_submission.c | 3502 [RCS0] = GEN8_RCS_IRQ_SHIFT, in logical_ring_default_irqs()
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| /linux/drivers/gpu/drm/i915/gem/ |
| A D | i915_gem_execbuffer.c | 2225 if (GRAPHICS_VER(rq->i915) != 7 || rq->engine->id != RCS0) { in i915_reset_gen7_sol_offsets()
2472 [I915_EXEC_DEFAULT] = RCS0,
2473 [I915_EXEC_RENDER] = RCS0,
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| /linux/drivers/gpu/drm/i915/display/ |
| A D | intel_overlay.c | 1402 engine = to_gt(dev_priv)->engine[RCS0]; in intel_overlay_setup()
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