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Searched refs:REFCLK (Results 1 – 17 of 17) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dccg/dcn314/
A Ddcn314_dccg.c162 if (src == REFCLK) in dccg314_set_dtbclk_p_src()
171 if (src == REFCLK) in dccg314_set_dtbclk_p_src()
180 if (src == REFCLK) in dccg314_set_dtbclk_p_src()
189 if (src == REFCLK) in dccg314_set_dtbclk_p_src()
264 DPSTREAMCLK0_EN, (src == REFCLK) ? 0 : 1, in dccg314_set_dpstreamclk()
269 DPSTREAMCLK1_EN, (src == REFCLK) ? 0 : 1, in dccg314_set_dpstreamclk()
274 DPSTREAMCLK2_EN, (src == REFCLK) ? 0 : 1, in dccg314_set_dpstreamclk()
279 DPSTREAMCLK3_EN, (src == REFCLK) ? 0 : 1, in dccg314_set_dpstreamclk()
305 dccg314_set_dpstreamclk(dccg, REFCLK, otg_inst, in dccg314_init()
/linux/drivers/gpu/drm/amd/display/dc/dccg/dcn32/
A Ddcn32_dccg.c161 if (src == REFCLK) in dccg32_set_dtbclk_p_src()
170 if (src == REFCLK) in dccg32_set_dtbclk_p_src()
179 if (src == REFCLK) in dccg32_set_dtbclk_p_src()
188 if (src == REFCLK) in dccg32_set_dtbclk_p_src()
292 (src == REFCLK) ? 0 : 1, DPSTREAMCLK0_SRC_SEL, otg_inst); in dccg32_set_dpstreamclk()
296 (src == REFCLK) ? 0 : 1, DPSTREAMCLK1_SRC_SEL, otg_inst); in dccg32_set_dpstreamclk()
300 (src == REFCLK) ? 0 : 1, DPSTREAMCLK2_SRC_SEL, otg_inst); in dccg32_set_dpstreamclk()
304 (src == REFCLK) ? 0 : 1, DPSTREAMCLK3_SRC_SEL, otg_inst); in dccg32_set_dpstreamclk()
/linux/drivers/clk/berlin/
A Dbg2.c90 REFCLK, VIDEO_EXT0, enumerator
103 [REFCLK] = "refclk",
516 clk = of_clk_get_by_name(np, clk_names[REFCLK]); in berlin2_clock_setup()
518 clk_names[REFCLK] = __clk_get_name(clk); in berlin2_clock_setup()
530 clk_names[SYSPLL], clk_names[REFCLK], 0); in berlin2_clock_setup()
535 clk_names[MEMPLL], clk_names[REFCLK], 0); in berlin2_clock_setup()
540 clk_names[CPUPLL], clk_names[REFCLK], 0); in berlin2_clock_setup()
549 clk_names[REFCLK], avpll_flags, 0); in berlin2_clock_setup()
577 parent_names[1] = clk_names[REFCLK]; in berlin2_clock_setup()
585 parent_names[1] = clk_names[REFCLK]; in berlin2_clock_setup()
[all …]
A Dbg2q.c45 REFCLK, enumerator
52 [REFCLK] = "refclk",
313 clk = of_clk_get_by_name(np, clk_names[REFCLK]); in berlin2q_clock_setup()
315 clk_names[REFCLK] = __clk_get_name(clk); in berlin2q_clock_setup()
321 clk_names[SYSPLL], clk_names[REFCLK], 0); in berlin2q_clock_setup()
326 clk_names[CPUPLL], clk_names[REFCLK], 0); in berlin2q_clock_setup()
/linux/Documentation/devicetree/bindings/usb/
A Dsmsc,usb3503.yaml64 Clock used for driving REFCLK signal. If not provided the driver assumes
75 Frequency of the REFCLK signal as defined by REF_SEL pins. If not
76 provided, driver will not set rate of the REFCLK signal and assume that a
/linux/drivers/gpu/drm/amd/display/dc/dccg/dcn35/
A Ddcn35_dccg.c1307 if (src == REFCLK) in dccg35_set_dtbclk_p_src()
1316 if (src == REFCLK) in dccg35_set_dtbclk_p_src()
1325 if (src == REFCLK) in dccg35_set_dtbclk_p_src()
1334 if (src == REFCLK) in dccg35_set_dtbclk_p_src()
1439 (src == REFCLK) ? 0 : 1, DPSTREAMCLK0_SRC_SEL, otg_inst); in dccg35_set_dpstreamclk()
1441 REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, DPSTREAMCLK0_ROOT_GATE_DISABLE, (src == REFCLK) ? 0 : 1); in dccg35_set_dpstreamclk()
1445 (src == REFCLK) ? 0 : 1, DPSTREAMCLK1_SRC_SEL, otg_inst); in dccg35_set_dpstreamclk()
1451 (src == REFCLK) ? 0 : 1, DPSTREAMCLK2_SRC_SEL, otg_inst); in dccg35_set_dpstreamclk()
1457 (src == REFCLK) ? 0 : 1, DPSTREAMCLK3_SRC_SEL, otg_inst); in dccg35_set_dpstreamclk()
1746 dccg35_set_dpstreamclk(dccg, REFCLK, otg_inst, in dccg35_init()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/dccg/dcn401/
A Ddcn401_dccg.c225 if (src == REFCLK) in dccg401_set_dtbclk_p_src()
234 if (src == REFCLK) in dccg401_set_dtbclk_p_src()
243 if (src == REFCLK) in dccg401_set_dtbclk_p_src()
252 if (src == REFCLK) in dccg401_set_dtbclk_p_src()
587 if (src == REFCLK) in dccg401_set_dpstreamclk()
/linux/drivers/clk/versatile/
A DKconfig19 Supports clock muxing (REFCLK/TIMCLK to TIMERCLKEN0-3) capabilities
/linux/drivers/gpu/drm/amd/display/dc/inc/hw/
A Ddccg.h49 REFCLK, // Selects REFCLK as source for hdmistreamclk. enumerator
/linux/Documentation/devicetree/bindings/phy/
A Dphy-rockchip-naneng-combphy.yaml54 To achieve this a common clock source, referred to as REFCLK in
/linux/Documentation/gpu/amdgpu/display/
A Ddc-glossary.rst40 * REFCLK: Real Time Reference Clock
/linux/Documentation/devicetree/bindings/media/i2c/
A Dtoshiba,tc358746.yaml31 hardware pin REFCLK.
A Dti,ds90ub960.yaml31 Reference clock connected to the REFCLK pin.
/linux/drivers/video/fbdev/savage/
A Dsavagefb.h210 int MCLK, REFCLK, LCDclk; member
/linux/drivers/gpu/drm/amd/display/dc/dccg/dcn31/
A Ddcn31_dccg.c167 if (src == REFCLK) in dccg31_set_dpstreamclk()
/linux/Documentation/devicetree/bindings/pci/
A Dnvidia,tegra194-pcie-ep.yaml167 description: GPIO used to enable REFCLK to controller from the host
/linux/drivers/gpu/drm/amd/display/dc/hwss/dce110/
A Ddce110_hwseq.c1181 dccg->funcs->set_dpstreamclk(dccg, REFCLK, tg->inst, dp_hpo_inst); in dce110_disable_stream()

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