REG_SET_FIELD (reference) in projects: linux

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Searched refs:REG_SET_FIELD (Results 1 – 25 of 121) sorted by relevance

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/linux/drivers/gpu/drm/amd/amdgpu/
A D	gfxhub_v3_0_3.c	223 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, in gfxhub_v3_0_3_init_cache_regs() 226 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, in gfxhub_v3_0_3_init_cache_regs() 241 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, in gfxhub_v3_0_3_init_cache_regs() 245 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, in gfxhub_v3_0_3_init_cache_regs() 267 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT0_CNTL, in gfxhub_v3_0_3_enable_system_domain() 306 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v3_0_3_setup_vmid_config() 308 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v3_0_3_setup_vmid_config() 310 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v3_0_3_setup_vmid_config() 312 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v3_0_3_setup_vmid_config() 314 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v3_0_3_setup_vmid_config() [all …]
A D	gfxhub_v2_0.c	217 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, in gfxhub_v2_0_init_cache_regs() 220 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, in gfxhub_v2_0_init_cache_regs() 235 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, in gfxhub_v2_0_init_cache_regs() 239 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, in gfxhub_v2_0_init_cache_regs() 261 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT0_CNTL, in gfxhub_v2_0_enable_system_domain() 294 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_0_setup_vmid_config() 296 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_0_setup_vmid_config() 298 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_0_setup_vmid_config() 300 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_0_setup_vmid_config() 302 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_0_setup_vmid_config() [all …]
A D	mmhub_v3_0_2.c	236 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, in mmhub_v3_0_2_init_cache_regs() 254 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v3_0_2_init_cache_regs() 258 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v3_0_2_init_cache_regs() 280 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, in mmhub_v3_0_2_enable_system_domain() 322 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_2_setup_vmid_config() 324 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_2_setup_vmid_config() 327 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_2_setup_vmid_config() 329 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_2_setup_vmid_config() 331 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_2_setup_vmid_config() 333 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_2_setup_vmid_config() [all …]
A D	gfxhub_v11_5_0.c	221 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, in gfxhub_v11_5_0_init_cache_regs() 224 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, in gfxhub_v11_5_0_init_cache_regs() 239 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, in gfxhub_v11_5_0_init_cache_regs() 243 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, in gfxhub_v11_5_0_init_cache_regs() 265 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT0_CNTL, in gfxhub_v11_5_0_enable_system_domain() 304 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v11_5_0_setup_vmid_config() 306 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v11_5_0_setup_vmid_config() 308 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v11_5_0_setup_vmid_config() 310 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v11_5_0_setup_vmid_config() 312 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v11_5_0_setup_vmid_config() [all …]
A D	gfxhub_v12_0.c	226 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, in gfxhub_v12_0_init_cache_regs() 229 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, in gfxhub_v12_0_init_cache_regs() 244 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, in gfxhub_v12_0_init_cache_regs() 248 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, in gfxhub_v12_0_init_cache_regs() 270 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT0_CNTL, in gfxhub_v12_0_enable_system_domain() 309 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v12_0_setup_vmid_config() 311 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v12_0_setup_vmid_config() 313 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v12_0_setup_vmid_config() 315 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v12_0_setup_vmid_config() 317 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v12_0_setup_vmid_config() [all …]
A D	gfxhub_v3_0.c	218 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, in gfxhub_v3_0_init_cache_regs() 221 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, in gfxhub_v3_0_init_cache_regs() 236 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, in gfxhub_v3_0_init_cache_regs() 240 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, in gfxhub_v3_0_init_cache_regs() 262 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT0_CNTL, in gfxhub_v3_0_enable_system_domain() 301 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v3_0_setup_vmid_config() 303 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v3_0_setup_vmid_config() 305 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v3_0_setup_vmid_config() 307 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v3_0_setup_vmid_config() 309 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v3_0_setup_vmid_config() [all …]
A D	mmhub_v3_3.c	233 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, in mmhub_v3_3_init_cache_regs() 251 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v3_3_init_cache_regs() 255 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v3_3_init_cache_regs() 277 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, in mmhub_v3_3_enable_system_domain() 314 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_3_setup_vmid_config() 316 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_3_setup_vmid_config() 319 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_3_setup_vmid_config() 321 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_3_setup_vmid_config() 323 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_3_setup_vmid_config() 325 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_3_setup_vmid_config() [all …]
A D	mmhub_v3_0_1.c	237 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, in mmhub_v3_0_1_init_cache_regs() 255 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v3_0_1_init_cache_regs() 259 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v3_0_1_init_cache_regs() 281 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, in mmhub_v3_0_1_enable_system_domain() 317 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_1_setup_vmid_config() 319 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_1_setup_vmid_config() 322 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_1_setup_vmid_config() 324 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_1_setup_vmid_config() 326 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_1_setup_vmid_config() 328 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_1_setup_vmid_config() [all …]
A D	gfxhub_v1_0.c	198 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, in gfxhub_v1_0_init_cache_regs() 202 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, in gfxhub_v1_0_init_cache_regs() 228 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, in gfxhub_v1_0_enable_system_domain() 269 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gfxhub_v1_0_setup_vmid_config() 271 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gfxhub_v1_0_setup_vmid_config() 274 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gfxhub_v1_0_setup_vmid_config() 276 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gfxhub_v1_0_setup_vmid_config() 278 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gfxhub_v1_0_setup_vmid_config() 280 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gfxhub_v1_0_setup_vmid_config() 359 tmp = REG_SET_FIELD(tmp, in gfxhub_v1_0_gart_disable() [all …]
A D	mmhub_v3_0.c	244 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, in mmhub_v3_0_init_cache_regs() 262 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v3_0_init_cache_regs() 266 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v3_0_init_cache_regs() 288 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, in mmhub_v3_0_enable_system_domain() 330 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_setup_vmid_config() 332 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_setup_vmid_config() 335 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_setup_vmid_config() 337 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_setup_vmid_config() 339 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_setup_vmid_config() 341 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_setup_vmid_config() [all …]
A D	mmhub_v4_1_0.c	245 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, in mmhub_v4_1_0_init_cache_regs() 263 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v4_1_0_init_cache_regs() 267 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v4_1_0_init_cache_regs() 289 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, in mmhub_v4_1_0_enable_system_domain() 331 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v4_1_0_setup_vmid_config() 333 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v4_1_0_setup_vmid_config() 336 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v4_1_0_setup_vmid_config() 338 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v4_1_0_setup_vmid_config() 340 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v4_1_0_setup_vmid_config() 342 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v4_1_0_setup_vmid_config() [all …]
A D	mmhub_v2_0.c	288 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, in mmhub_v2_0_init_cache_regs() 306 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v2_0_init_cache_regs() 310 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v2_0_init_cache_regs() 332 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, in mmhub_v2_0_enable_system_domain() 374 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_0_setup_vmid_config() 376 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_0_setup_vmid_config() 379 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_0_setup_vmid_config() 381 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_0_setup_vmid_config() 383 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_0_setup_vmid_config() 385 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_0_setup_vmid_config() [all …]
A D	mmhub_v2_3.c	212 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, in mmhub_v2_3_init_cache_regs() 230 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v2_3_init_cache_regs() 234 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v2_3_init_cache_regs() 256 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, in mmhub_v2_3_enable_system_domain() 292 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_3_setup_vmid_config() 294 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_3_setup_vmid_config() 297 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_3_setup_vmid_config() 299 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_3_setup_vmid_config() 301 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_3_setup_vmid_config() 303 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_3_setup_vmid_config() [all …]
A D	hdp_v7_0.c	56 hdp_clk_cntl = REG_SET_FIELD(hdp_clk_cntl, HDP_CLK_CNTL, in hdp_v7_0_update_clock_gating() 61 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, HDP_MEM_POWER_CTRL, in hdp_v7_0_update_clock_gating() 63 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, HDP_MEM_POWER_CTRL, in hdp_v7_0_update_clock_gating() 65 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, HDP_MEM_POWER_CTRL, in hdp_v7_0_update_clock_gating() 83 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v7_0_update_clock_gating() 86 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v7_0_update_clock_gating() 90 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v7_0_update_clock_gating() 93 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v7_0_update_clock_gating() 97 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v7_0_update_clock_gating() 100 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v7_0_update_clock_gating() [all …]
A D	hdp_v5_2.c	58 hdp_clk_cntl = REG_SET_FIELD(hdp_clk_cntl, HDP_CLK_CNTL, in hdp_v5_2_update_mem_power_gating() 60 hdp_clk_cntl = REG_SET_FIELD(hdp_clk_cntl, HDP_CLK_CNTL, in hdp_v5_2_update_mem_power_gating() 65 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, HDP_MEM_POWER_CTRL, in hdp_v5_2_update_mem_power_gating() 87 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_2_update_mem_power_gating() 90 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_2_update_mem_power_gating() 94 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_2_update_mem_power_gating() 97 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_2_update_mem_power_gating() 101 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_2_update_mem_power_gating() 104 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_2_update_mem_power_gating() 121 hdp_clk_cntl = REG_SET_FIELD(hdp_clk_cntl, HDP_CLK_CNTL, in hdp_v5_2_update_mem_power_gating() [all …]
A D	hdp_v5_0.c	67 hdp_clk_cntl = REG_SET_FIELD(hdp_clk_cntl, HDP_CLK_CNTL, in hdp_v5_0_update_mem_power_gating() 69 hdp_clk_cntl = REG_SET_FIELD(hdp_clk_cntl, HDP_CLK_CNTL, in hdp_v5_0_update_mem_power_gating() 97 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_0_update_mem_power_gating() 100 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_0_update_mem_power_gating() 104 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_0_update_mem_power_gating() 107 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_0_update_mem_power_gating() 111 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_0_update_mem_power_gating() 116 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_0_update_mem_power_gating() 120 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_0_update_mem_power_gating() 138 hdp_clk_cntl = REG_SET_FIELD(hdp_clk_cntl, HDP_CLK_CNTL, in hdp_v5_0_update_mem_power_gating() [all …]
A D	hdp_v6_0.c	62 hdp_clk_cntl = REG_SET_FIELD(hdp_clk_cntl, HDP_CLK_CNTL, in hdp_v6_0_update_clock_gating() 70 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, HDP_MEM_POWER_CTRL, in hdp_v6_0_update_clock_gating() 72 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, HDP_MEM_POWER_CTRL, in hdp_v6_0_update_clock_gating() 74 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, HDP_MEM_POWER_CTRL, in hdp_v6_0_update_clock_gating() 92 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v6_0_update_clock_gating() 95 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v6_0_update_clock_gating() 99 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v6_0_update_clock_gating() 102 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v6_0_update_clock_gating() 106 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v6_0_update_clock_gating() 109 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v6_0_update_clock_gating() [all …]
A D	ih_v6_0.c	101 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL2, in force_update_wptr_for_self_int() 103 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL2, in force_update_wptr_for_self_int() 219 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, in ih_v6_0_rb_cntl() 221 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, in ih_v6_0_rb_cntl() 340 ih_chicken = REG_SET_FIELD(ih_chicken, in ih_v6_0_irq_init() 373 tmp = REG_SET_FIELD(tmp, IH_MSI_STORM_CTRL, in ih_v6_0_irq_init() 687 data = REG_SET_FIELD(data, IH_CLK_CTRL, in ih_v6_0_update_clockgating_state() 689 data = REG_SET_FIELD(data, IH_CLK_CTRL, in ih_v6_0_update_clockgating_state() 691 data = REG_SET_FIELD(data, IH_CLK_CTRL, in ih_v6_0_update_clockgating_state() 693 data = REG_SET_FIELD(data, IH_CLK_CTRL, in ih_v6_0_update_clockgating_state() [all …]
A D	nbio_v7_9.c	107 doorbell_ctrl = REG_SET_FIELD(doorbell_ctrl, in nbio_v7_9_sdma_doorbell_range() 110 doorbell_ctrl = REG_SET_FIELD(doorbell_ctrl, in nbio_v7_9_sdma_doorbell_range() 113 doorbell_ctrl = REG_SET_FIELD(doorbell_ctrl, in nbio_v7_9_sdma_doorbell_range() 124 doorbell_ctrl = REG_SET_FIELD(doorbell_ctrl, in nbio_v7_9_sdma_doorbell_range() 127 doorbell_ctrl = REG_SET_FIELD(doorbell_ctrl, in nbio_v7_9_sdma_doorbell_range() 130 doorbell_ctrl = REG_SET_FIELD(doorbell_ctrl, in nbio_v7_9_sdma_doorbell_range() 141 doorbell_ctrl = REG_SET_FIELD(doorbell_ctrl, in nbio_v7_9_sdma_doorbell_range() 144 doorbell_ctrl = REG_SET_FIELD(doorbell_ctrl, in nbio_v7_9_sdma_doorbell_range() 147 doorbell_ctrl = REG_SET_FIELD(doorbell_ctrl, in nbio_v7_9_sdma_doorbell_range() 158 doorbell_ctrl = REG_SET_FIELD(doorbell_ctrl, in nbio_v7_9_sdma_doorbell_range() [all …]
A D	lsdma_v6_0.c	56 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, BYTE_COUNT, size); in lsdma_v6_0_copy_mem() 57 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, SRC_LOCATION, 0); in lsdma_v6_0_copy_mem() 58 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, DST_LOCATION, 0); in lsdma_v6_0_copy_mem() 59 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, SRC_ADDR_INC, 0); in lsdma_v6_0_copy_mem() 60 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, DST_ADDR_INC, 0); in lsdma_v6_0_copy_mem() 62 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, CONSTANT_FILL, 0); in lsdma_v6_0_copy_mem() 88 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, BYTE_COUNT, size); in lsdma_v6_0_fill_mem() 89 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, SRC_LOCATION, 0); in lsdma_v6_0_fill_mem() 90 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, DST_LOCATION, 0); in lsdma_v6_0_fill_mem() 91 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, SRC_ADDR_INC, 0); in lsdma_v6_0_fill_mem() [all …]
A D	lsdma_v7_0.c	56 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, BYTE_COUNT, size); in lsdma_v7_0_copy_mem() 57 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, SRC_LOCATION, 0); in lsdma_v7_0_copy_mem() 58 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, DST_LOCATION, 0); in lsdma_v7_0_copy_mem() 59 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, SRC_ADDR_INC, 0); in lsdma_v7_0_copy_mem() 60 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, DST_ADDR_INC, 0); in lsdma_v7_0_copy_mem() 62 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, CONSTANT_FILL, 0); in lsdma_v7_0_copy_mem() 88 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, BYTE_COUNT, size); in lsdma_v7_0_fill_mem() 89 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, SRC_LOCATION, 0); in lsdma_v7_0_fill_mem() 90 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, DST_LOCATION, 0); in lsdma_v7_0_fill_mem() 91 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, SRC_ADDR_INC, 0); in lsdma_v7_0_fill_mem() [all …]
A D	ih_v6_1.c	101 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL2, in force_update_wptr_for_self_int() 103 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL2, in force_update_wptr_for_self_int() 191 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, in ih_v6_1_rb_cntl() 193 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, in ih_v6_1_rb_cntl() 312 ih_chicken = REG_SET_FIELD(ih_chicken, in ih_v6_1_irq_init() 345 tmp = REG_SET_FIELD(tmp, IH_MSI_STORM_CTRL, in ih_v6_1_irq_init() 666 data = REG_SET_FIELD(data, IH_CLK_CTRL, in ih_v6_1_update_clockgating_state() 668 data = REG_SET_FIELD(data, IH_CLK_CTRL, in ih_v6_1_update_clockgating_state() 670 data = REG_SET_FIELD(data, IH_CLK_CTRL, in ih_v6_1_update_clockgating_state() 672 data = REG_SET_FIELD(data, IH_CLK_CTRL, in ih_v6_1_update_clockgating_state() [all …]
A D	ih_v7_0.c	101 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL2, in force_update_wptr_for_self_int() 103 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL2, in force_update_wptr_for_self_int() 191 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, in ih_v7_0_rb_cntl() 193 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, in ih_v7_0_rb_cntl() 312 ih_chicken = REG_SET_FIELD(ih_chicken, in ih_v7_0_irq_init() 345 tmp = REG_SET_FIELD(tmp, IH_MSI_STORM_CTRL, in ih_v7_0_irq_init() 656 data = REG_SET_FIELD(data, IH_CLK_CTRL, in ih_v7_0_update_clockgating_state() 658 data = REG_SET_FIELD(data, IH_CLK_CTRL, in ih_v7_0_update_clockgating_state() 660 data = REG_SET_FIELD(data, IH_CLK_CTRL, in ih_v7_0_update_clockgating_state() 662 data = REG_SET_FIELD(data, IH_CLK_CTRL, in ih_v7_0_update_clockgating_state() [all …]
A D	gfxhub_v1_2.c	247 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, in gfxhub_v1_2_xcc_init_cache_regs() 251 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, in gfxhub_v1_2_xcc_init_cache_regs() 282 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, in gfxhub_v1_2_xcc_enable_system_domain() 339 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gfxhub_v1_2_xcc_setup_vmid_config() 341 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gfxhub_v1_2_xcc_setup_vmid_config() 344 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gfxhub_v1_2_xcc_setup_vmid_config() 346 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gfxhub_v1_2_xcc_setup_vmid_config() 348 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gfxhub_v1_2_xcc_setup_vmid_config() 362 tmp = REG_SET_FIELD( in gfxhub_v1_2_xcc_setup_vmid_config() 454 tmp = REG_SET_FIELD(tmp, in gfxhub_v1_2_xcc_gart_disable() [all …]
A D	mmhub_v1_8.c	230 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, in mmhub_v1_8_init_cache_regs() 233 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, in mmhub_v1_8_init_cache_regs() 237 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, in mmhub_v1_8_init_cache_regs() 239 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, in mmhub_v1_8_init_cache_regs() 252 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, in mmhub_v1_8_init_cache_regs() 256 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, in mmhub_v1_8_init_cache_regs() 264 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL4, in mmhub_v1_8_init_cache_regs() 266 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL4, in mmhub_v1_8_init_cache_regs() 269 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL4, in mmhub_v1_8_init_cache_regs() 271 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL4, in mmhub_v1_8_init_cache_regs() [all …]

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