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Searched refs:RESET (Results 1 – 25 of 156) sorted by relevance

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/linux/drivers/reset/
A Dreset-rzg2l-usbphy-ctrl.c17 #define RESET 0x000 macro
54 val = readl(base + RESET); in rzg2l_usbphy_ctrl_assert()
58 writel(val, base + RESET); in rzg2l_usbphy_ctrl_assert()
73 val = readl(base + RESET); in rzg2l_usbphy_ctrl_deassert()
77 writel(val, base + RESET); in rzg2l_usbphy_ctrl_deassert()
91 return !!(readl(priv->base + RESET) & port_mask); in rzg2l_usbphy_ctrl_status()
156 val = readl(priv->base + RESET); in rzg2l_usbphy_ctrl_probe()
158 writel(val, priv->base + RESET); in rzg2l_usbphy_ctrl_probe()
/linux/arch/mips/cobalt/
A Dreset.c21 #define RESET 0x0f macro
48 writeb(RESET, RESET_PORT); in cobalt_machine_restart()
/linux/Documentation/devicetree/bindings/reset/
A Dti,tps380x-reset.yaml15 RESET signal if the voltage drops below a preset threshold or upon a manual
16 reset input (MR). The RESET output remains asserted for the factory
/linux/arch/arm/boot/dts/intel/pxa/
A Dpxa300-raumfeld-tuneable-clock.dtsi74 MFP_PIN_PXA300(120) MFP_AF0 /* RESET */
81 MFP_PIN_PXA300(111) MFP_AF0 /* RESET */
/linux/drivers/misc/altera-stapl/
A Daltera-jtag.c35 /* RESET */ { RESET, IDLE },
44 /* IRSELECT */ { RESET, IRCAPTURE },
307 } else if (state == RESET) in altera_goto_jstate()
354 tms = (wait_state == RESET) ? TMS_HIGH : TMS_LOW; in altera_wait_cycles()
598 case RESET: in altera_irscan()
697 case RESET: in altera_swap_ir()
801 case RESET: in altera_drscan()
892 case RESET: in altera_swap_dr()
/linux/Documentation/devicetree/bindings/net/
A Dmdio.yaml33 The phandle and specifier for the GPIO that controls the RESET
38 RESET pulse width in microseconds. It applies to all MDIO devices
40 requirements (maximum value of all per-device RESET pulse widths).
A Dsmsc,lan91c111.yaml32 description: GPIO connected to control RESET pin
/linux/Documentation/devicetree/bindings/net/wireless/
A Dmicrochip,wilc1000.yaml39 and deasserting RESET. This should be declared as an
45 connected to the RESET line. This should be declared as an
/linux/drivers/media/i2c/
A Dov2640.c126 #define RESET 0xE0 /* Reset */ macro
382 { RESET, RESET_JPEG | RESET_DVP },
500 { RESET, RESET_DVP },
525 { RESET, 0x00}
601 { RESET, 0x00 },
611 { RESET, 0x00 },
619 { RESET, 0x00 },
627 { RESET, 0x00 },
A Dmt9m111.c430 return reg_write(RESET, MT9M111_RESET_CHIP_ENABLE); in mt9m111_enable()
438 ret = reg_set(RESET, MT9M111_RESET_RESET_MODE); in mt9m111_reset()
440 ret = reg_set(RESET, MT9M111_RESET_RESET_SOC); in mt9m111_reset()
442 ret = reg_clear(RESET, MT9M111_RESET_RESET_MODE in mt9m111_reset()
917 ret = reg_set(RESET, MT9M111_RESET_RESET_MODE); in mt9m111_suspend()
919 ret = reg_set(RESET, MT9M111_RESET_RESET_SOC | in mt9m111_suspend()
923 ret = reg_clear(RESET, MT9M111_RESET_CHIP_ENABLE); in mt9m111_suspend()
/linux/drivers/iio/chemical/
A Dsps30.c35 RESET, enumerator
72 if (state->state == RESET) { in sps30_do_meas()
98 state->state = RESET; in sps30_do_reset()
/linux/drivers/media/dvb-frontends/
A Dzl10353_priv.h45 RESET = 0x55, enumerator
A Dmt352_priv.h66 RESET = 0x50, enumerator
A Dmt312_priv.h35 RESET = 21, enumerator
/linux/sound/isa/sb/
A Dsb_common.c66 outb(1, SBP(chip, RESET)); in snd_sbdsp_reset()
68 outb(0, SBP(chip, RESET)); in snd_sbdsp_reset()
/linux/drivers/input/keyboard/
A Dqt1070.c39 #define RESET 0x39 macro
185 qt1070_write(client, RESET, 1); in qt1070_probe()
/linux/Documentation/devicetree/bindings/sound/
A Dpcm1789.txt13 - reset-gpios: GPIO to control the RESET pin
/linux/arch/arm/boot/dts/nxp/imx/
A Dimx6ull-dhcor-maveo-box.dts77 "BUTTON-RESET", "", "", "",
123 "PSOC-SWD-IO", "PSOC-SWD-CLK", "PSOC-RESET", "ZIGBEE-PROG",
124 "ZIGBEE-RESET", "", "PSOC-PWR-FAIL-OUT", "NFC-ENABLE",
/linux/arch/arm64/boot/dts/ti/
A Dk3-am65-iot2050-common-pg2.dtsi29 "", "", "", "", "CP2102N-RESET";
/linux/drivers/gpu/drm/hisilicon/kirin/
A Ddw_dsi_reg.h18 #define RESET 0 macro
/linux/Documentation/devicetree/bindings/iio/chemical/
A Dplantower,pms7003.yaml34 description: GPIO connected to the RESET line
/linux/Documentation/devicetree/bindings/iio/potentiometer/
A Dadi,ad5272.yaml30 Active low signal to the AD5272 RESET input.
/linux/drivers/gpu/drm/radeon/
A Drv740d.h56 #define RESET (1 << 30) macro
/linux/arch/arm64/boot/dts/mediatek/
A Dmt7981b-cudy-wr3000-v1.dts29 label = "RESET";
/linux/drivers/net/wireless/ath/ath9k/
A Dlink.c49 ath_dbg(ath9k_hw_common(sc->sc_ah), RESET, in ath_tx_complete_check()
83 ath_dbg(common, RESET, in ath_hw_check()
105 ath_dbg(common, RESET, "PLL WAR, resetting the chip\n"); in ath_hw_pll_rx_hang_check()

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